Issued Patents All Time
Showing 1–6 of 6 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5345573 | High speed burst read address generation with high speed transfer | Chester M. Nibby, Jr. | 1994-09-06 |
| 5291580 | High performance burst read data transfer operation | Richard A. Lemay, Chester M. Nibby, Jr., Jeffrey S. Somers | 1994-03-01 |
| 5210867 | Method and apparatus for memory retry | George J. Barlow, Michelle A. Pence | 1993-05-11 |
| 5204964 | Method and apparatus for resetting a memory upon power recovery | Michelle A. Pence, George J. Barlow, Marc Sanfacon, Jeffrey S. Somers | 1993-04-20 |
| 4964129 | Memory controller with error logging | Edward R. Salas, Marc Sanfacon, Jeffrey S. Somers | 1990-10-16 |
| 4964130 | System for determining status of errors in a memory subsystem | Edward R. Salas, Marc Sanfacon, Jeffrey S. Somers | 1990-10-16 |