| 9344377 |
Packet processing architecture |
Fong Pong, Chun Ning, Patrick Lau |
2016-05-17 |
| 7320022 |
System on a chip for caching of data packets based on a cache miss/hit and a state of a control signal |
Mark D. Hayter, Shailendra Desai, Daniel W. Dobberpuhl |
2008-01-15 |
| 7287649 |
System on a chip for packet processing |
Mark D. Hayter, Shailendra Desai, Daniel W. Dobberpuhl |
2007-10-30 |
| 7240141 |
Programmable inter-virtual channel and intra-virtual channel instructions issuing rules for an I/O bus of a system-on-a-chip processor |
Chun Ning, Laurent Moll, Shun Wai Go, Piyush Jamkhandi |
2007-07-03 |
| 7003615 |
Tracking a non-posted writes in a system using a storage location to store a write response indicator when the non-posted write has reached a target device |
Shun Wai Go, Mark D. Hayter, Chun Ning, Amy K. Silveria |
2006-02-21 |
| 6851004 |
Adaptive retry mechanism |
James B. Keller, Chun Ning, Mark D. Hayter |
2005-02-01 |
| 6681302 |
Page open hint in transactions |
James Y. Cho, Chun Ning |
2004-01-20 |
| 6633936 |
Adaptive retry mechanism |
James B. Keller, Chun Ning, Mark D. Hayter |
2003-10-14 |
| 6526483 |
Page open hint in transactions |
James Y. Cho, Chun Ning |
2003-02-25 |
