Issued Patents All Time
Showing 26–50 of 56 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5591674 | Integrated circuit with silicon contact to silicide | Chen-Hua Yu | 1997-01-07 |
| 5559052 | Integrated circuit fabrication with interlevel dielectric | Chen-Hua Yu | 1996-09-24 |
| 5521861 | High-speed high-density SRAM cell | Chun-Ting Liu | 1996-05-28 |
| 5488248 | Memory integrated circuit | Janmye Sung | 1996-01-30 |
| 5468669 | Integrated circuit fabrication | Horng-Dar Lin, Ran-Hong Yan, Chen-Hua Yu | 1995-11-21 |
| 5438006 | Method of fabricating gate stack having a reduced height | Chorng-Ping Chang, Chun-Ting Liu, Ruichen Liu | 1995-08-01 |
| 5431770 | Transistor gate formation | Chen-Hua Yu | 1995-07-11 |
| 5420058 | Method of making field effect transistor with a sealed diffusion junction | Chun-Ting Liu, Ruichen Liu | 1995-05-30 |
| 5418173 | Method of reducing ionic contamination in integrated circuit fabrication | Chen-Hua Yu | 1995-05-23 |
| 5416033 | Integrated circuit and manufacture | Chung-Ting Liu, Kurt G. Steiner, Chen-Hua Yu | 1995-05-16 |
| 5411899 | Transistor fabrication of a twin tub using angled implant | Chen-Hua Yu | 1995-05-02 |
| 5407859 | Field effect transistor with landing pad | Chun-Ting Liu, Ruichen Liu | 1995-04-18 |
| 5399532 | Integrated circuit window etch and planarization | Chen-Hua Yu | 1995-03-21 |
| 5395787 | Method of manufacturing shallow junction field effect transistor | Chun-Ting Liu, Ruichen Liu | 1995-03-07 |
| 5353245 | Memory integrated circuit with balanced resistance | Janmye Sung | 1994-10-04 |
| 5334541 | Method of fabricating an integrated circuit with lines of critical width extending in the astigmatically preferred direction of the lithographic tool | Thomas E. Adams, William J. Nagy, Janmye Sung | 1994-08-02 |
| 5278096 | Transistor fabrication method | Chen-Hua Yu | 1994-01-11 |
| 5215930 | Integrated circuit etching of silicon nitride and polysilicon using phosphoric acid | Chen-Hua Yu | 1993-06-01 |
| 5185291 | Method of making severable conductive path in an integrated-circuit device | Frederick Harrison Fischer, William J. Nagy, Nur Selamoglu | 1993-02-09 |
| 5153145 | FET with gate spacer | Chih-Yuan Lu, Janmye Sung | 1992-10-06 |
| 5128738 | Integrated circuit | William J. Nagy, Janmye Sung | 1992-07-07 |
| 5066998 | Severable conductive path in an integrated-circuit device | Frederick Harrison Fischer, William J. Nagy, Nur Selamoglu | 1991-11-19 |
| RE33622 | Integrated circuits having stepped dielectric regions | Samuel E. Polanco | 1991-06-25 |
| 5025300 | Integrated circuits having improved fusible links | James Billig, James D. Chlipala, William J. Nagy | 1991-06-18 |
| 5002898 | Integrated-circuit device isolation | Larry Bruce Fritzinger, Chih-Yuan Lu, Janmye Sung | 1991-03-26 |