Issued Patents All Time
Showing 51–67 of 67 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6385101 | Programmable delay control for sense amplifiers in a memory | William R. Weier, Richard Y. Wong | 2002-05-07 |
| 6157583 | Integrated circuit memory having a fuse detect circuit and method therefor | Glenn E. Starnes, Stephen T. Flannagan | 2000-12-05 |
| 6111796 | Programmable delay control for sense amplifiers in a memory | William R. Weier, Richard Y. Wong | 2000-08-29 |
| 6108266 | Memory utilizing a programmable delay to control address buffers | William R. Weier, Glenn E. Starnes | 2000-08-22 |
| 6031775 | Dynamic sense amplifier in a memory capable of limiting the voltage swing on high-capacitance global data lines | William R. Weier | 2000-02-29 |
| 5978286 | Timing control of amplifiers in a memory | William R. Weier, Richard Y. Wong | 1999-11-02 |
| 5670815 | Layout for noise reduction on a reference voltage | Lawrence F. Childs, Stephen T. Flannagan, Donovan Raatz | 1997-09-23 |
| 5610543 | Delay locked loop for detecting the phase difference of two signals having different frequencies | Stephen T. Flannagan, Kenneth W. Jones | 1997-03-11 |
| 5477176 | Power-on reset circuit for preventing multiple word line selections during power-up of an integrated circuit memory | Lawrence F. Childs, Kenneth W. Jones, Donovan Raatz, Stephen T. Flannagan | 1995-12-19 |
| 5440515 | Delay locked loop for detecting the phase difference of two signals having different frequencies | Stephen T. Flannagan, Kenneth W. Jones | 1995-08-08 |
| 5440514 | Write control for a memory using a delay locked loop | Stephen T. Flannagan, Lawrence F. Childs | 1995-08-08 |
| 5422848 | ECL-to-CMOS buffer having a single-sided delay | Kenneth W. Jones | 1995-06-06 |
| 5384737 | Pipelined memory having synchronous and asynchronous operating modes | Lawrence F. Childs, Kenneth W. Jones, Stephen T. Flannagan | 1995-01-24 |
| 5268863 | Memory having a write enable controlled word line | Mark D. Bader, Kenneth W. Jones, Karl L. Wang | 1993-12-07 |
| 5258951 | Memory having output buffer enable by level comparison and method therefor | Ruey J. Yu, Kenneth W. Jones, Karl L. Wang | 1993-11-02 |
| 5202594 | Low power level converter | — | 1993-04-13 |
| 4991140 | Integrated circuit memory with improved di/dt control | Karl L. Wang | 1991-02-05 |