Issued Patents All Time
Showing 1–12 of 12 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11038492 | Clock pulse generation circuit | Steven F. Schicht | 2021-06-15 |
| 10592367 | Redundancy implementation using bytewise shifting | Steven F. Schicht | 2020-03-17 |
| 10535400 | Level shifting dynamic write driver | Steven F. Schicht | 2020-01-14 |
| 10389335 | Clock pulse generation circuit | Steven F. Schicht | 2019-08-20 |
| 9922688 | Bitline sensing latch | — | 2018-03-20 |
| 9564901 | Self-timed dynamic level shifter with falling edge generator | Daniel C. Chow, Kenneth W. Jones | 2017-02-07 |
| 6385101 | Programmable delay control for sense amplifiers in a memory | Ray L. Chang, Richard Y. Wong | 2002-05-07 |
| 6111796 | Programmable delay control for sense amplifiers in a memory | Ray L. Chang, Richard Y. Wong | 2000-08-29 |
| 6108266 | Memory utilizing a programmable delay to control address buffers | Ray L. Chang, Glenn E. Starnes | 2000-08-22 |
| 6044036 | Buffer circuit, memory device, and integrated circuit for receiving digital signals | Stephen T. Flannagan | 2000-03-28 |
| 6031775 | Dynamic sense amplifier in a memory capable of limiting the voltage swing on high-capacitance global data lines | Ray L. Chang | 2000-02-29 |
| 5978286 | Timing control of amplifiers in a memory | Ray L. Chang, Richard Y. Wong | 1999-11-02 |