Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
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William D. Heavlin — 13 Patents

AMD: 12 patents #1,049 of 9,280Top 15%
Google: 1 patents #14,887 of 22,993Top 65%
El Granada, CA: #21 of 115 inventorsTop 20%
California: #47,433 of 386,348 inventorsTop 15%
Overall (All Time): #362,438 of 4,157,543Top 9%
13 Patents All Time
William D. Heavlin has been granted 13 US patents while listed as an inventor at AMD. The first was granted in 1997 and the most recent in October 2018. William D. Heavlin ranks #362,438 of 4,157,543 US inventors in our database (top 8.7%). Patent records list William D. Heavlin in El Granada, CA, US.

Patents per Year

Patents granted per year, 1997 to 2018Bar chart with a peak of 2 patents in 1997.peak 21997: 2 patents19971998: 1 patents19981999: 2 patents19992001: 1 patents20012002: 2 patents20022003: 2 patents20032004: 1 patents20042006: 1 patents20062018: 1 patents2018

Issued Patents All Time

Showing 1–13 of 13 patents

Patent #TitleCo-InventorsDateApprox Value ⓘ
10101050 Dispatch engine for optimizing demand-response thermostat events Ana Radovanovic, Wolf-Dietrich Weber, Ankit Somani, Seungil You, Matthew D. Wytock 2018-10-16 $22,774,000
7069196 Experimental design for complex systems 2006-06-27 $11,248,000
6708073 Lot specific process design methodology 2004-03-16 $3,543,000
6586755 Feed-forward control of TCI doping for improving mass-production-wise statistical distribution of critical performance parameters in semiconductor devices Zoran Krivokapic 2003-07-01 $4,199,000
6567717 Feed-forward control of TCI doping for improving mass-production-wise, statistical distribution of critical performance parameters in semiconductor devices Zoran Krivokapic 2003-05-20 $2,116,000
6389366 Methods for identifying sources of patterns in processing effects in manufacturing 2002-05-14 $2,737,000
6366822 Statistical process window design methodology 2002-04-02 $3,760,000
6304836 Worst case design parameter extraction for logic technologies Zoran Krivokapic 2001-10-16 $3,616,000
5966527 Apparatus, article of manufacture, method and system for simulating a mass-produced semiconductor device behavior Zoran Krivokapic 1999-10-12 $2,065,000
5946214 Computer implemented method for estimating fabrication yield for semiconductor integrated circuit including memory blocks with redundant rows and/or columns Richard Kittler, Ping Wen 1999-08-31 $2,486,000
5724251 System and method for designing, fabricating and testing multiple cell test structures to validate a cell library 1998-03-03 $5,989,000
5655110 Method for setting and adjusting process parameters to maintain acceptable critical dimensions across each die of mass-produced semiconductor wafers Zoran Krivokapic, David F. Kyser 1997-08-05 $8,420,000
5646870 Method for setting and adjusting process parameters to maintain acceptable critical dimensions across each die of mass-produced semiconductor wafers Zoran Krivokapic, David F. Kyser 1997-07-08 $8,107,000