Issued Patents All Time
Showing 26–42 of 42 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10365996 | Performance-aware and reliability-aware data placement for n-level heterogeneous memory systems | Manish Gupta, David A. Roberts, Mitesh R. Meswani, Steven Raasch, Daniel I. Lowell | 2019-07-30 |
| 10331537 | Waterfall counters and an application to architectural vulnerability factor estimation | Manish Gupta, David A. Roberts | 2019-06-25 |
| 10073746 | Method and apparatus for providing distributed checkpointing | Sergey Blagodurov, Taniya Siddiqua | 2018-09-11 |
| 9734059 | Methods and apparatus for data cache way prediction based on classification as stack data | Lena E. Olson, Yasuko Eckert, James M. O'Connor, Mark D. Hill, Srilatha Manne | 2017-08-15 |
| 9448933 | Using redundant transactions to verify the correctness of program code execution | Sudhanva Gurumurthi | 2016-09-20 |
| 9406403 | Spare memory external to protected memory | Gabriel H. Loh, James M. O'Connor | 2016-08-02 |
| 9367372 | Software only intra-compute unit redundant multithreading for GPUs | Alexander Lyashevsky, Sudhanva Gurumurthi | 2016-06-14 |
| 9354970 | Method and apparatus for encoding erroneous data in an error correction code protected memory | Ross V. La Fetra, Vydhyanathan Kalyanasundharam, Dean A. Liberty, Amit P. Apte | 2016-05-31 |
| 9298615 | Methods and apparatus for soft-partitioning of a data cache for stack data | Lena E. Olson, Yasuko Eckert, James M. O'Connor, Mark D. Hill, Srilatha Manne | 2016-03-29 |
| 9292418 | Determining the vulnerability of multi-threaded program code to soft errors | Mark E. Wilkening, Sudhanva Gurumurthi | 2016-03-22 |
| 9274904 | Software only inter-compute unit redundant multithreading for GPUs | Alexander Lyashevsky, Sudhanva Gurumurthi | 2016-03-01 |
| 9229803 | Dirty cacheline duplication | Gabriel H. Loh, James M. O'Connor, Jaewoong Sim | 2016-01-05 |
| 9189326 | Detecting and correcting hard errors in a memory array | John Kalamatianos, Johnsy Kanjirapallil John, Robert G. Gelinas, Phillip E. Nevius | 2015-11-17 |
| 9106260 | Parity data management for a memory architecture | James M. O'Connor, Gabriel H. Loh | 2015-08-11 |
| 9047192 | Signature-based store checking buffer | Sudhanva Gurumurthi | 2015-06-02 |
| 9026847 | Hardware based redundant multi-threading inside a GPU for improved reliability | Sudhanva Gurumurthi | 2015-05-05 |
| 8984368 | High reliability memory controller | Gabriel H. Loh | 2015-03-17 |