Issued Patents All Time
Showing 1–8 of 8 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7991955 | Method and apparatus to achieve more level thermal gradient | Michael D. Bienek, Randal L. Posey, Michael C. Braganza | 2011-08-02 |
| 7355881 | Memory array with global bitline domino read/write scheme | Floyd L. Dankert, Randal L. Posey, Michael Kevin Ciraula, Alexander W. Schaefer, Jerry D. Moench +4 more | 2008-04-08 |
| 5873114 | Integrated processor and memory control unit including refresh queue logic for refreshing DRAM during idle cycles | Saba Rahman | 1999-02-16 |
| 5842041 | Computer system employing a control signal indicative of whether address is within address space of devices on processor local bus | Gerard T. McKee, Kelly M. Horton | 1998-11-24 |
| 5778431 | System and apparatus for partially flushing cache memory | Saba Rahman, Dan S. Mudgett | 1998-07-07 |
| 5649161 | Prepaging during PCI master initiated wait cycles | Kelly M. Horton | 1997-07-15 |
| 5623638 | Memory control unit with programmable edge generator to minimize delay periods for critical DRAM timing parameters | — | 1997-04-22 |
| 5623673 | System management mode and in-circuit emulation memory mapping and locking method | Douglas D. Gephardt, James R. MacDonald | 1997-04-22 |