Issued Patents All Time
Showing 26–31 of 31 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6941529 | Method and system for using emission microscopy in physical verification of memory device architecture | W. Eugen Hill, Mehrdad Mahanpour | 2005-09-06 |
| 6907379 | System and method for processing tester information and visualization for parameter with multiple distributions in integrated circuit technology development | Franklyn Shihyu Wu | 2005-06-14 |
| 6875560 | Testing multiple levels in integrated circuit technology development | Paul J. Steffan, Jeffrey P. Erhardt | 2005-04-05 |
| 6864107 | Determination of nonphotolithographic wafer process-splits in integrated circuit technology development | Jeffrey P. Erhardt | 2005-03-08 |
| 6815233 | Method of simultaneous display of die and wafer characterization in integrated circuit technology development | Jeffrey P. Erhardt | 2004-11-09 |
| 6766265 | Processing tester information by trellising in integrated circuit technology development | Jeffrey P. Erhardt | 2004-07-20 |