Issued Patents All Time
Showing 51–75 of 88 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6173348 | Using a control line to insert a control message during a data transfer on a bus | — | 2001-01-09 |
| 6167492 | Circuit and method for maintaining order of memory access requests initiated by devices coupled to a multiprocessor system | James B. Keller, Dale E. Gulick, Geoffrey S. Strongin | 2000-12-26 |
| 6151651 | Communication link with isochronous and asynchronous priority modes coupling bridge circuits in a computer system | Dale E. Gulick | 2000-11-21 |
| 6148357 | Integrated CPU and memory controller utilizing a communication link having isochronous and asynchronous priority modes | Dale E. Gulick | 2000-11-14 |
| 6119194 | Method and apparatus for monitoring universal serial bus activity | Paul C. Miranda, David Norris, James Bunnell | 2000-09-12 |
| 6100461 | Wavetable cache using simplified looping | — | 2000-08-08 |
| 6085330 | Control circuit for switching a processor between multiple low power states to allow cache snoops | James Bunnell | 2000-07-04 |
| 6058066 | Enhanced register array accessible by both a system microprocessor and a wavetable audio synthesizer | David Norris, Jeffrey M. Blumenthal | 2000-05-02 |
| 6032211 | Method of mode control in a bus optimized for personal computer data traffic | — | 2000-02-29 |
| 5987541 | Computer system using signal modulation techniques to enhance multimedia device communication | — | 1999-11-16 |
| 5964883 | Arrangement and method for handling bus clock speed variations | — | 1999-10-12 |
| 5956493 | Bus arbiter including programmable request latency counters for varying arbitration priority | Scott E. Swanstrom | 1999-09-21 |
| 5918073 | System and method for equalizing data buffer storage and fetch rates of peripheral devices | — | 1999-06-29 |
| 5901333 | Vertical wavetable cache architecture in which the number of queues is substantially smaller than the total number of voices stored in the system memory | — | 1999-05-04 |
| 5898886 | Multimedia devices in computer system that selectively employ a communications protocol by determining the presence of the quaternary interface | — | 1999-04-27 |
| 5898892 | Computer system with a data cache for providing real-time multimedia data to a multimedia engine | Dale E. Gulick, Andy Lambrecht, Mike Webb, Brian C. Barnes | 1999-04-27 |
| 5896291 | Computer system and method for implementing delay-based effects using system memory | David N. Suggs, David Norris | 1999-04-20 |
| 5870622 | Computer system and method for transferring commands and data to a dedicated multimedia engine | Dale E. Gulick, Andy Lambrecht, Mike Webb, Brian C. Barnes | 1999-02-09 |
| 5859995 | Method and apparatus for coordinating combinatorial logic-clocked state machines | — | 1999-01-12 |
| 5847304 | PC audio system with frequency compensated wavetable data | — | 1998-12-08 |
| 5812800 | Computer system which includes a local expansion bus and a dedicated real-time bus and including a multimedia memory for increased multi-media performance | Dale E. Gulick, Andy Lambrecht, Mike Webb, Brian C. Barnes | 1998-09-22 |
| 5809466 | Audio processing chip with external serial port | Glen W. Brown, Dale E. Gulick, Michael J. Hogan, David Norris, Martin P. Soques +1 more | 1998-09-15 |
| 5797028 | Computer system having an improved digital and analog configuration | Dale E. Gulick, Andy Lambrecht, Mike Webb, Brian C. Barnes | 1998-08-18 |
| 5796851 | Digital method to eliminate power-on pops and clicks | Carlin D. Cabler | 1998-08-18 |
| 5794021 | Variable frequency clock generation circuit using aperiodic patterns | — | 1998-08-11 |