Jimshed Mirza — 23 Patents at AMD

Jimshed Mirza has been granted 23 US patents while listed as an inventor at AMD. The first was granted in 2013 and the most recent in July 2025. Jimshed Mirza ranks #178,160 of 4,157,543 US inventors in our database (top 4.3%). Patent records list Jimshed Mirza in Markham, ON, CA.

Patents per Year

Issued Patents All Time

Showing 1–23 of 23 patents

Patent #	Title	Co-Inventors	Date	Approx Value ⓘ
12360909	Last use cache policy	—	2025-07-15
12321273	Cascading execution of atomic operations	Mark Fowler	2025-06-03
12236529	Graphics discard engine	Christopher J. Brennan, Randy Wayne Ramsey, Nishank Pathak, Ricky Wai Yeung Iu, Anthony Chan	2025-02-25
12169876	Optimizing partial writes to compressed blocks	Anthony Chan, Christopher J. Brennan, Mark Fowler, David Chui, Leon Lai	2024-12-17	$286,725,000
12105634	Translation lookaside buffer entry allocation system and method	Edwin Pang	2024-10-01
11935153	Data compression support for accelerated processor	Sergey Korobkov, Anthony Chan	2024-03-19	$317,160,000
10956338	Low latency dirty RAM for cache invalidation speed improvement	Leon King Nok Lai, Qian Ma	2021-03-23
10915359	Variable latency request arbitration	Qian Ma, Leon King Nok Lai	2021-02-09
10877926	Method and system for partial wavefront merger	Yunpeng Zhu	2020-12-29	$249,582,000
10664403	Per-group prefetch status to reduce duplicate prefetch requests	Leon King Nok Lai, Qian Ma	2020-05-26
10649810	Data driven scheduler on multiple computing cores	Yunpeng Zhu	2020-05-12	$51,452,000
10606740	Flexible shader export design in multiple computing cores	Yunpeng Zhu	2020-03-31	$59,042,000
10580110	Hardware structure to track page reuse	Al Hasanur Rahman, Sergey Korobkov, Houman Namiranian	2020-03-03
10545887	Multiple linked list data structure	Qian Ma	2020-01-28
10540290	Method and apparatus for translation lookaside buffer with multiple compressed encodings	Gabriel H. Loh	2020-01-21
10540280	High-speed selective cache invalidates and write-backs on GPUS	Mark Fowler, Anthony Asaro	2020-01-21	$74,103,000
10535178	Shader writes to compressed resources	Christopher J. Brennan, Anthony Chan, Leon Lai	2020-01-14	$63,420,000
10353859	Register allocation modes in a GPU based on total, maximum concurrent, and minimum number of registers needed by complex shaders	Yunpeng Zhu	2019-07-16	$38,969,000
10241925	Selecting a default page size in a variable page size TLB	Anthony Chan, Edwin Pang	2019-03-26
10223280	Input/output memory map unit and northbridge	Vydhyanathan Kalyanasundharam, Yaniv Adiri, Philip Ng, Maggie Chan, Vincent Cueva +4 more	2019-03-05	$23,702,000
10025721	Input/output memory map unit and northbridge	Vydhyanathan Kalyanasundharam, Philip Ng, Maggie Chan, Vincent Cueva, Anthony Asaro +4 more	2018-07-17	$10,665,000
9239804	Back-off mechanism for a peripheral page request log	Andrew G. Kegel, Paul Blinzer, Philip Ng	2016-01-19	$1,034,000
8495300	Cache with reload capability after power restoration	Philip Ng, Anthony Asaro	2013-07-23

Jimshed Mirza — 23 Patents

Patents per Year

Issued Patents All Time

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