Issued Patents All Time
Showing 26–44 of 44 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5742531 | Configurable parallel and bit serial load apparatus | Philip M. Freidin, Stephen M. Trimberger, John E. Mahoney | 1998-04-21 |
| 5717340 | Circuit for testing pumped voltage gates in a programmable gate array | Alok Mehrotra | 1998-02-10 |
| 5694056 | Fast pipeline frame full detector | John E. Mahoney, Stephen M. Trimberger | 1997-12-02 |
| 5646564 | Phase-locked delay loop for clock correction | Philip M. Freidin, Kerry M. Pierce | 1997-07-08 |
| 5640106 | Method and structure for loading data into several IC devices | Lawrence C. Hung | 1997-06-17 |
| 5631577 | Synchronous dual port RAM | Philip M. Freidin, Edmond Y. Cheung, Tsung-Lu Syu | 1997-05-20 |
| 5613099 | Persistent object storage system with modifiable group skeletal formats | Roger Sessions | 1997-03-18 |
| 5600271 | Input signal interface with independently controllable pull-up and pull-down circuitry | Peter H. Alfke | 1997-02-04 |
| 5598424 | Error detection structure and method for serial or parallel data stream using partial polynomial check | Philip M. Freidin, William A. Wilkie | 1997-01-28 |
| 5592105 | Configuration logic to eliminate signal contention during reconfiguration | Edmond Y. Cheung | 1997-01-07 |
| 5581199 | Interconnect architecture for field programmable gate array using variable length conductors | Kerry M. Pierce, Chih-Tsung Huang, Douglas P. Wieland | 1996-12-03 |
| 5566123 | Synchronous dual port ram | Philip M. Freidin, Edmond Y. Cheung, Tsung-Lu Syu | 1996-10-15 |
| 5523963 | Logic structure and circuit for fast carry | Hung-Cheng Hsieh, by William S. Carter, administrator, Edmond Y. Cheung | 1996-06-04 |
| 5489858 | Soft wakeup output buffer | Kerry M. Pierce | 1996-02-06 |
| 5430687 | Programmable logic device including a parallel input device for loading memory cells | Lawrence C. Hung | 1995-07-04 |
| 5410194 | Asynchronous or synchronous load multifunction flip-flop | Philip M. Freidin | 1995-04-25 |
| 5331220 | Soft wakeup output buffer | Kerry M. Pierce | 1994-07-19 |
| 5321704 | Error detection structure and method using partial polynomial check | Philip M. Freidin | 1994-06-14 |
| 5140193 | Programmable connector for programmable logic device | Ross H. Freeman, Khue Duong, Hung-Cheng Hsieh, William S. Carter | 1992-08-18 |