Issued Patents All Time
Showing 25 most recent of 45 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12411799 | Transaction based remote direct memory access | Nafea Bshara, Leah Shalev, Erez Izenberg, Georgy Machulsky | 2025-09-09 |
| 12393258 | Wake-up management circuit for multiple processors | Said Bshara, Dror Fleischmann, Erez Izenberg, Avigdor Segal, Jonathan Cohen | 2025-08-19 |
| 12393548 | Flexible remote direct memory access | Erez Izenberg, Leah Shalev, Nafea Bshara, Georgy Machulsky | 2025-08-19 |
| 12306719 | Link down resilience | Roi Ben Haim, Sergey Kleyman, Ariel Pescovsky, Muhamad Grefat, Uri Leder | 2025-05-20 |
| 12271511 | Security protection for synchronization pulses | Moshe Raz, Zvika Glaubach | 2025-04-08 |
| 12236260 | Configurable address decoder | Dan Saad, Lev Vaskevich, Aviv Bonomo | 2025-02-25 |
| 12050486 | System halt support for synchronization pulses | Moshe Raz, Zvika Glaubach, Moshe Noah | 2024-07-30 |
| 12001352 | Transaction ordering based on target address | Rashika Kheria, Ron Diamant, Se Wang Oh | 2024-06-04 |
| 11960392 | Configurable routing in a multi-chip system | Dan Saad, Yaniv Shapira, Erez Izenberg | 2024-04-16 |
| 11936393 | Cooperative timing alignment using synchronization pulses | Moshe Raz, Zvika Glaubach | 2024-03-19 |
| 11899969 | Re-order buffer for in-order execution of dependent write transactions | Barak Singer, Jonathan Cohen, Simaan Bahouth | 2024-02-13 |
| 11892967 | Flexible remote direct memory access | Erez Izenberg, Leah Shalev, Nafea Bshara, Georgy Machulsky | 2024-02-06 |
| 11886355 | Emulated endpoint configuration | Nafea Bshara, Adi Habusha, Georgy Machulsky | 2024-01-30 |
| 11880327 | Non-coherent and coherent connections in a multi-chip system | Barak Wasserstrom, Yaniv Shapira, Erez Izenberg, Adi Habusha | 2024-01-23 |
| 11860781 | Clean engine for write-back cache memory | Moshe Raz, Gal Avisar | 2024-01-02 |
| 11853253 | Transaction based remote direct memory access | Nafea Bshara, Leah Shalev, Erez Izenberg, Georgy Machulsky | 2023-12-26 |
| 11836103 | Traffic separation in a multi-chip system | Roi Ben Haim, Erez Izenberg, Adi Habusha, Yaniv Shapira | 2023-12-05 |
| 11768990 | Interconnect flow graph for integrated circuit design | Uri Leder, Ori Ariel, Max Chvalevsky, Benzi Denkberg | 2023-09-26 |
| 11748285 | Transaction ordering management | Roi Ben Haim, Adi Habusha, Simaan Bahouth | 2023-09-05 |
| 11640366 | Address decoder for a multi-chip system | Dan Saad, Yaniv Shapira, Aviv Bonomo, Moshe Gutman | 2023-05-02 |
| 11436183 | Flexible remote direct memory access | Erez Izenberg, Leah Shalev, Nafea Bshara, Georgy Machulsky | 2022-09-06 |
| 11321247 | Emulated endpoint configuration | Nafea Bshara, Adi Habusha, Georgy Machulsky | 2022-05-03 |
| 11003616 | Data transfer using point-to-point interconnect | Adi Habusha, Yaniv Shapira, Daniel Joseph Grey | 2021-05-11 |
| 10911358 | Packet processing cache | Benzi Denkberg, Erez Izenberg, Nafea Bshara, Uri Leder, Ofer Frishman | 2021-02-02 |
| 10884974 | Flexible remote direct memory access | Erez Izenberg, Leah Shalev, Nafea Bshara, Georgy Machulsky | 2021-01-05 |