Issued Patents All Time
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11768990 | Interconnect flow graph for integrated circuit design | Uri Leder, Ori Ariel, Max Chvalevsky, Guy Nakibly | 2023-09-26 |
| 11544436 | Hardware-software interaction testing using formal verification | Uri Leder, Ori Cohen, Max Chvalevsky | 2023-01-03 |
| 10929584 | Environmental modification testing for design correctness with formal verification | Uri Leder, Ori Weber | 2021-02-23 |
| 10911358 | Packet processing cache | Guy Nakibly, Erez Izenberg, Nafea Bshara, Uri Leder, Ofer Frishman | 2021-02-02 |
| 10298496 | Packet processing cache | Guy Nakibly, Erez Izenberg, Nafea Bshara, Uri Leder, Ofer Frishman | 2019-05-21 |
| 10228869 | Controlling shared resources and context data | Guy Nakibly, Ofer Frishman, Erez Izenberg, Uri Leder, Nafea Bshara | 2019-03-12 |