Issued Patents All Time
Showing 26–50 of 80 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10977192 | Real-time memory-page state tracking and its applications | Nafea Bshara | 2021-04-13 |
| 10901627 | Tracking persistent memory usage | Nafea Bshara, Thomas A. Volpe | 2021-01-26 |
| 10884790 | Eliding redundant copying for virtual machine migration | Ali Ghassan Saidi | 2021-01-05 |
| 10846163 | Hybrid hardware and software reporting management | Hani Ayoub, Itay Poleg | 2020-11-24 |
| 10838869 | Predictive prefetch of a memory page | Itai Avron, Maxim Tzipori | 2020-11-17 |
| 10839124 | Interactive compilation of software to a hardware language to satisfy formal verification constraints | Uri Leder, Ofer Naaman, Tzachi Zidenberg, Ohad Gdalyahu | 2020-11-17 |
| 10824506 | Memory controller with parallel error checking and decompression | Itai Avron | 2020-11-03 |
| 10768965 | Reducing copy operations for a virtual machine migration | Ali Ghassan Saidi | 2020-09-08 |
| 10754797 | Consolidating write transactions for a network device | Georgy Machulsky, Netanel Israel Belgazal, Said Bshara, Nafea Bshara | 2020-08-25 |
| 10740466 | Securing interfaces of a compute node | Nafea Bshara, Matthew Shawn Wilson, Eric Jason Brandwine, Anthony Nicholas Liguori, Yaniv Shapira +1 more | 2020-08-11 |
| 10733048 | Memory controller with parallel error checking and decryption | Itai Avron, Gal Paikin, Simaan Bahouth | 2020-08-04 |
| 10725957 | Uniform memory access architecture | Mark Bradley Davis, Thomas A. Volpe, Nafea Bshara, Yaniv Shapira | 2020-07-28 |
| 10719463 | Hardware handling memory write request during memory data migration | Nafea Bshara, Mark Bradley Davis, Matthew Shawn Wilson, Uwe Dannowski, Yaniv Shapira +1 more | 2020-07-21 |
| 10705985 | Integrated circuit with rate limiting | Benny Pollak, Dana Michelle Vantrease | 2020-07-07 |
| 10691850 | Power projection using machine learning | Lev Makovsky, Ron Diamant | 2020-06-23 |
| 10691576 | Multiple reset types in a system | Yaniv Shapira, Gil Stoler | 2020-06-23 |
| 10635589 | System and method for managing transactions | Gil Stoler, Said Bshara, Nafea Bshara | 2020-04-28 |
| 10621134 | Generating transactions with a configurable port | Nafea Bshara, Itay Poleg, Erez Izenberg, Guy Nakibly, Matthew Shawn Wilson | 2020-04-14 |
| 10521365 | Emulated endpoint configuration | Nafea Bshara, Guy Nakibly, Georgy Machulsky | 2019-12-31 |
| 10509758 | Emulated switch with hot-plugging | Georgy Machulsky, Nafea Bshara, Tal Zilcer | 2019-12-17 |
| 10503624 | Time-based on-chip hardware performance monitor | Itai Avron | 2019-12-10 |
| 10489302 | Emulated translation unit using a management processor | Leah Shalev, Nafea Bshara | 2019-11-26 |
| 10437748 | Core-to-core communication | Leah Shalev, Georgy Machulsky, Nafea Bshara, Eric Jason Brandwine | 2019-10-08 |
| 10409744 | Low-latency wake-up in a peripheral device | Saar Gross, Said Bshara, Nafea Bshara, Ronen Shitrit | 2019-09-10 |
| 10402252 | Alternative event reporting for peripheral devices | Eric Jason Brandwine | 2019-09-03 |