Issued Patents All Time
Showing 1–25 of 25 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11996131 | Preconditioning operation for a memory cell with a spontaneously-polarizable memory element | Johannes Ocker | 2024-05-28 |
| 11735267 | Managing pre-programming of a memory device for a reflow process | Ji Hye Shin, Tomoko Ogura Iwasaki, Jayasree Nayar | 2023-08-22 |
| 11694727 | Memory devices including heaters | Tomoko Ogura Iwasaki, Jayasree Nayar, Ji Hye Shin | 2023-07-04 |
| 11646083 | Multi-stage erase operation for a memory device | Shinji Sato | 2023-05-09 |
| 11609712 | Write operations to mitigate write disturb | Christina Papagianni | 2023-03-21 |
| 11537754 | Pseudo physically unclonable functions (PUFS) using one or more addressable arrays of elements having random/pseudo-random values | John Ross Jameson, David Kim | 2022-12-27 |
| 11423990 | Multi-stage erase operation for a memory device | Shinji Sato | 2022-08-23 |
| 11417368 | Memory devices including heaters | Tomoko Ogura Iwasaki, Jayasree Nayar, Ji Hye Shin | 2022-08-16 |
| 11069412 | Managing pre-programming of a memory device for a reflow process | Ji Hye Shin, Tomoko Ogura Iwasaki, Jayasree Nayar | 2021-07-20 |
| 11037638 | Write operations to mitigate write disturb | Christina Papagianni | 2021-06-15 |
| 9818939 | Resistive switching devices having a switching layer and an intermediate electrode layer and methods of formation thereof | John Ross Jameson, John Sanchez, Wei Ti Lee, Yi Ma, Venkatesh P. Gopinath | 2017-11-14 |
| 9734902 | Resistive memory device with ramp-up/ramp-down program/erase pulse | Deepak Kamalanathan, Juan Pablo Saenz Echeverry, John Dinh, Shane Hollmer, Michael N. Kozicki | 2017-08-15 |
| 9711719 | Nonvolatile memory elements having conductive structures with semimetals and/or semiconductors | John Ross Jameson | 2017-07-18 |
| 9431101 | Resistive devices and methods of operation thereof | Michael A. Van Buskirk | 2016-08-30 |
| 9373786 | Two terminal resistive access devices and methods of formation thereof | Deepak Kamalanathan | 2016-06-21 |
| 9305643 | Solid electrolyte based memory devices and methods having adaptable read threshold levels | Venkatesh P. Gopinath, Derric Lewis | 2016-04-05 |
| 9252359 | Resistive switching devices having a switching layer and an intermediate electrode layer and methods of formation thereof | John Ross Jameson, John Sanchez, Wei Ti Lee | 2016-02-02 |
| 9165644 | Method of operating a resistive memory device with a ramp-up/ramp-down program/erase pulse | Deepak Kamalanathan, Juan Pablo Saenz Echeverry, John Dinh, Shane Hollmer, Michael N. Kozicki | 2015-10-20 |
| 9025396 | Pre-conditioning circuits and methods for programmable impedance elements in memory devices | Deepak Kamalanathan, Juan Pablo Saenz Echeverry, Venkatesh P. Gopinath, Janet Wang | 2015-05-05 |
| 8995167 | Reverse program and erase cycling algorithms | David Kim, Deepak Kamalanathan | 2015-03-31 |
| 8953362 | Resistive devices and methods of operation thereof | Michael A. Van Buskirk | 2015-02-10 |
| 8847191 | Programmable impedance memory elements, methods of manufacture, and memory devices containing the same | Antonio R. Gallo | 2014-09-30 |
| 8847192 | Resistive switching devices having alloyed electrodes and methods of formation thereof | Wei Ti Lee, Chakravarthy Gopalan, Yi Ma, Jeffrey A. Shields, Philippe Blanchard +3 more | 2014-09-30 |
| 8659954 | CBRAM/ReRAM with improved program and erase algorithms | Derric Lewis, Shane Hollmer, Vasudevan Gopalakrishnan, John Dinh, Juan Pablo Saenz Echeverry | 2014-02-25 |
| 8624219 | Variable impedance memory element structures, methods of manufacture, and memory devices containing the same | John Ross Jameson, Antonio R. Gallo, Michael A. Van Buskirk | 2014-01-07 |