Issued Patents 2025
Showing 1–9 of 9 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12431899 | Self-gating flops for dynamic power reduction | Mahesh Kumashikar, Yuet-Wing Li, Atul Maheshwari, Ankireddy Nalamalpu | 2025-09-30 |
| 12379698 | Systems and methods to reduce voltage guardband | Mahesh Kumashikar, Mahesh A. Iyer, Yuet-Wing Li, Atul Maheshwari, Ankireddy Nalamalpu | 2025-08-05 |
| 12353238 | Flexible instruction set architecture supporting varying frequencies | Dheeraj Subbareddy, Anshuman Thakur, Atul Maheshwari, Mahesh Kumashikar, Ankireddy Nalamalpu | 2025-07-08 |
| 12355359 | Switch based on load current | Ankireddy Nalamalpu, Mahesh Kumashikar, Dheeraj Subbareddy, Atul Maheshwari, Mahesh A. Iyer | 2025-07-08 |
| 12347783 | Interconnect architecture with silicon interposer and EMIB | Ankireddy Nalamalpu, Dheeraj Subbareddy, Robert Sankman, Ravindranath V. Mahajan, Debendra Mallik +7 more | 2025-07-01 |
| 12341511 | Power management using voltage islands on programmable logic devices | Mahesh Kumashikar, Ankireddy Nalamalpu, Dheeraj Subbareddy, Atul Maheshwari, Yuet-Wing Li +1 more | 2025-06-24 |
| 12294368 | Three-dimensional stacked programmable logic fabric and processor design architecture | Rahul Pal, Dheeraj Subbareddy, Mahesh Kumashikar, Dheemanth Nagaraj, Rajesh Vivekanandham +3 more | 2025-05-06 |
| 12266625 | Innovative interconnect design for package architecture to improve latency | Ankireddy Nalamalpu, Dheeraj Subbareddy | 2025-04-01 |
| 12206410 | Programmable logic device with fine-grained disaggregation | Dheeraj Subbareddy, Ankireddy Nalamalpu, Robert Sankman, Ravindranath V. Mahajan, Gregg William Baeckler | 2025-01-21 |