Issued Patents 2025
Showing 1–10 of 10 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12429900 | Controlled transition between configuration mode and user mode to reduce current-resistance voltage drop | Ankireddy Nalamalpu, Mahesh A. Iyer, Mahesh Kumashikar | 2025-09-30 |
| 12431899 | Self-gating flops for dynamic power reduction | Mahesh Kumashikar, MD Altaf Hossain, Yuet-Wing Li, Ankireddy Nalamalpu | 2025-09-30 |
| 12422477 | Segmented row repair for programmable logic devices | Dheeraj Subbareddy, Arun Jangity, Ramya Yeluri, Mahesh Kumashikar, Ankireddy Nalamalpu | 2025-09-23 |
| 12413231 | Circuits and methods for routing crossbars with programmable vias | Wayson J. Lowe, David Parkhouse, Alexander Andreev, Ban Wong | 2025-09-09 |
| 12379698 | Systems and methods to reduce voltage guardband | Mahesh Kumashikar, MD Altaf Hossain, Mahesh A. Iyer, Yuet-Wing Li, Ankireddy Nalamalpu | 2025-08-05 |
| 12355359 | Switch based on load current | MD Altaf Hossain, Ankireddy Nalamalpu, Mahesh Kumashikar, Dheeraj Subbareddy, Mahesh A. Iyer | 2025-07-08 |
| 12353238 | Flexible instruction set architecture supporting varying frequencies | Dheeraj Subbareddy, Anshuman Thakur, Mahesh Kumashikar, MD Altaf Hossain, Ankireddy Nalamalpu | 2025-07-08 |
| 12341511 | Power management using voltage islands on programmable logic devices | Mahesh Kumashikar, Ankireddy Nalamalpu, MD Altaf Hossain, Dheeraj Subbareddy, Yuet-Wing Li +1 more | 2025-06-24 |
| 12294368 | Three-dimensional stacked programmable logic fabric and processor design architecture | Rahul Pal, Dheeraj Subbareddy, Mahesh Kumashikar, Dheemanth Nagaraj, Rajesh Vivekanandham +3 more | 2025-05-06 |
| 12273107 | Dynamically scalable timing and power models for programmable logic devices | Mahesh A. Iyer, Mahesh Kumashikar, Ian Kuon, Yuet-Wing Li, Ankireddy Nalamalpu +1 more | 2025-04-08 |