Issued Patents 2025
Showing 1–6 of 6 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12430128 | Sharing register file usage between fused processing resources | Subramaniam Maiyuran, Varghese George, Joydeep Ray, Ashutosh Garg, Shubh Shah +1 more | 2025-09-30 |
| 12405787 | Utilizing structured sparsity in systolic arrays | Subramaniam Maiyuran, Ashutosh Garg, Chandra Gurram, Chunhui Mei, Durgesh Borkar +10 more | 2025-09-02 |
| 12399685 | Systolic array having support for output sparsity | Fangwen Fu, Subramaniam Maiyuran, Varghese George, Mike B. Macpherson, Supratim Pal +6 more | 2025-08-26 |
| 12346694 | Register file for systolic array | Chandra Gurram, Wei-Yu Chen, Fangwen Fu, Sabareesh Ganapathy, Varghese George +4 more | 2025-07-01 |
| 12189571 | Dual pipeline parallel systolic array | Jiasheng Chen, Supratim Pal, Fangwen Fu, Sabareesh Ganapathy, Chandra Gurram +2 more | 2025-01-07 |
| 12190158 | Using sparsity metadata to reduce systolic array power consumption | Supratim Pal, Jiasheng Chen, Chandra Gurram | 2025-01-07 |