Issued Patents 2025
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12399685 | Systolic array having support for output sparsity | Jorge Parra, Fangwen Fu, Subramaniam Maiyuran, Varghese George, Mike B. Macpherson +6 more | 2025-08-26 |
| 12380326 | Machine learning sparse computation mechanism for arbitrary neural networks, arithmetic compute microarchitecture, and sparsity for training mechanism | Eriko Nurvitadhi, Amit Bleiweiss, Deborah T. Marr, Eugene Wang, Saritha Dwarakapuram | 2025-08-05 |
| 12346694 | Register file for systolic array | Chandra Gurram, Wei-Yu Chen, Fangwen Fu, Varghese George, Guei-Yuan Lueh +4 more | 2025-07-01 |
| 12189571 | Dual pipeline parallel systolic array | Jorge Parra, Jiasheng Chen, Supratim Pal, Fangwen Fu, Chandra Gurram +2 more | 2025-01-07 |