Issued Patents 2024
Showing 1–14 of 14 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12182488 | Semiconductor device including standard-cell-adapted power grid arrangement | Hiranmay Biswas, Chung-Hsing Wang, Chin-Shen Lin | 2024-12-31 |
| 12176288 | Semiconductor device including frontside power mesh and backside power mesh and manufacturing method thereof | Wan-Yu Lo, Chin-Shen Lin, Chi-Yu Lu, Chih-Liang Chen, Chung-Hsing Wang | 2024-12-24 |
| 12159899 | Semiconductor device | Jung-Chan Yang, Hui-Zhong Zhuang, Chih-Liang Chen, Ting-Wei Chiang, Cheng-I Huang | 2024-12-03 |
| 12112117 | Method of manufacturing a semiconductor device including PG-aligned cells | Hiranmay Biswas, Chung-Hsing Wang | 2024-10-08 |
| 12106030 | Method of forming merged pillar structures and method of generating layout diagram of same | Hiranmay Biswas, Chung-Hsing Wang, Yi-Kan Cheng | 2024-10-01 |
| 12107048 | Layouts for conductive layers in integrated circuits | Wan-Yu Lo, Chung-Hsing Wang, Chin-Shen Lin, Meng-Xiang Lee, Hao-Tien Kan +1 more | 2024-10-01 |
| 12093625 | Integrated circuit design method, system and computer program product | Wan-Yu Lo, Chin-Shen Lin, Chung-Hsing Wang | 2024-09-17 |
| 12067337 | Power grid, IC and method for placing power grid | Hiranmay Biswas, Chung-Hsing Wang | 2024-08-20 |
| 12033998 | Integrated circuit and method of forming the same | Kuang-Ching Chang, Jung-Chan Yang, Hui-Zhong Zhuang, Chih-Liang Chen | 2024-07-09 |
| 12019972 | Method and system of forming semiconductor device | Wan-Yu Lo, Chung-Hsing Wang, Hiranmay Biswas | 2024-06-25 |
| 12014982 | Integrated circuit device and method | Cheng-Yu Lin, Jung-Chan Yang, Hui-Zhong Zhuang, Sheng-Hsiung Chen, Chih-Liang Chen +1 more | 2024-06-18 |
| 11935833 | Method of forming power grid structures | Hiranmay Biswas, Chi-Yeh Yu, Chung-Hsing Wang, Stefan Rusu, Chin-Shen Lin | 2024-03-19 |
| 11929331 | Routing structure | Chin-Shen Lin, Wan-Yu Lo, Meng-Xiang Lee, Hao-Tien Kan, Chung-Hsing Wang | 2024-03-12 |
| 11908853 | Integrated circuit and method of generating integrated circuit layout | Fong-Yuan Chang, Chung-Hsing Wang, Lee-Chung Lu, Sheng-Fong Chen, Po-Hsiang Huang +3 more | 2024-02-20 |