Issued Patents 2024
Showing 1–2 of 2 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12107048 | Layouts for conductive layers in integrated circuits | Wan-Yu Lo, Chung-Hsing Wang, Chin-Shen Lin, Kuo-Nan Yang, Meng-Xiang Lee +1 more | 2024-10-01 |
| 11929331 | Routing structure | Chin-Shen Lin, Wan-Yu Lo, Meng-Xiang Lee, Kuo-Nan Yang, Chung-Hsing Wang | 2024-03-12 |