Issued Patents 2024
Showing 51–75 of 95 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12034006 | Input/output semiconductor devices | Mao-Lin Huang, Lung-Kun Chu, Chung-Wei Hsu, Jia-Ni Yu | 2024-07-09 |
| 12021136 | Gate isolation feature and manufacturing method thereof | Kuan-Ting Pan, Huan-Chieh Su, Jia-Chuan You, Shi Ning Ju, Yi-Ruei Jhan +2 more | 2024-06-25 |
| 12021132 | Gate patterning process for multi-gate devices | Mao-Lin Huang, Lung-Kun Chu, Chung-Wei Hsu, Jia-Ni Yu, Chih-Hao Wang | 2024-06-25 |
| 12021123 | Semiconductor devices with backside power rail and backside self-aligned via | Shi Ning Ju, Kuan-Lun Cheng, Chih-Hao Wang, Cheng-Chi Chuang | 2024-06-25 |
| 12014960 | Etch profile control of polysilicon structures of semiconductor devices | Chih-Hao Wang, Kuan-Ting Pan | 2024-06-18 |
| 12009215 | Semiconductor device structure with silicide layer | Chun-Hsiung Lin, Jung-Hung Chang, Shih-Cheng Chen, Chih-Hao Wang | 2024-06-11 |
| 12009261 | Nanosheet devices with hybrid structures and methods of fabricating the same | Shi Ning Ju, Guan-Lin Chen, Jung-Chien Cheng, Chih-Hao Wang, Kuan-Lun Cheng | 2024-06-11 |
| 11996332 | Semiconductor device and method of manufacturing the same | Kuan-Ting Pan, Chih-Hao Wang, Yi-Bo Liao, Yi-Ruei Jhan | 2024-05-28 |
| 11996481 | Liner for a bi-layer gate helmet and the fabrication thereof | Huan-Chieh Su, Chih-Hao Wang, Wei-Hao Wu, Zhi-Chang Lin, Jia-Ni Yu +2 more | 2024-05-28 |
| 11996410 | Gap-insulated semiconductor device | Jung-Chien Cheng, Chih-Hao Wang, Guan-Lin Chen, Shi Ning Ju, Kuan-Lun Cheng | 2024-05-28 |
| 11996334 | Semiconductor device fabrication methods and structures thereof | Chung-Wei Hsu, Mao-Lin Huang, Lung-Kun Chu, Jia-Ni Yu, Kuan-Lun Cheng +1 more | 2024-05-28 |
| 11996298 | Reversed tone patterning method for dipole incorporation for multiple threshold voltages | Lung-Kun Chu, Jia-Ni Yu, Chun-Fu Lu, Chih-Hao Wang | 2024-05-28 |
| 11990471 | Gate isolation for multigate device | Shi Ning Ju, Guan-Lin Chen, Kuan-Ting Pan, Chih-Hao Wang | 2024-05-21 |
| 11990374 | Method for forming sidewall spacers and semiconductor devices fabricated thereof | Kuan-Ting Pan, Shi Ning Ju, Yi-Ruei Jhan, Kuan-Lun Cheng, Chih-Hao Wang | 2024-05-21 |
| 11984488 | Multigate device with air gap spacer and backside rail contact and method of fabricating thereof | Guan-Lin Chen, Shi Ning Ju, Chih-Hao Wang, Kuan-Lun Cheng | 2024-05-14 |
| 11984361 | Multi-gate devices and method of fabricating the same | Lo-Heng Chang, Chih-Hao Wang, Jung-Hung Chang, Pei-Hsun Wang | 2024-05-14 |
| 11973079 | Integration of multiple fin structures on a single substrate | Chih-Chao Chou, Chih-Hao Wang, Shi Ning Ju, Wen-Ting Lan | 2024-04-30 |
| 11967594 | Semiconductor device structure and methods of forming the same | Shih-Cheng Chen, Zhi-Chang Lin, Jung-Hung Chang, Lo-Heng Chang, Chien Ning Yao +1 more | 2024-04-23 |
| 11961763 | Self-aligned metal gate for multigate device and method of forming thereof | Jia-Chuan You, Kuan-Ting Pan, Shi Ning Ju, Chih-Hao Wang | 2024-04-16 |
| 11961915 | Capacitance reduction for back-side power rail device | Shi Ning Ju, Chih-Hao Wang, Kuan-Lun Cheng, Wen-Ting Lan | 2024-04-16 |
| 11961913 | Semiconductor device structure and method for forming the same | Shi Ning Ju, Ching-Wei Tsai, Kuan-Lun Cheng, Chih-Hao Wang | 2024-04-16 |
| 11961900 | Integrated circuit with a fin and gate structure and method making the same | Teng-Chun Tsai, Kuan-Lun Cheng, Chih-Hao Wang | 2024-04-16 |
| 11961840 | Semiconductor device having nanosheet transistor and methods of fabrication thereof | Mao-Lin Huang, Lung-Kun Chu, Chung-Wei Hsu, Jia-Ni Yu, Kuan-Lun Cheng +1 more | 2024-04-16 |
| 11948987 | Self-aligned backside source contact structure | Lung-Kun Chu, Mao-Lin Huang, Chung-Wei Hsu, Jia-Ni Yu, Kuan-Lun Cheng +1 more | 2024-04-02 |
| 11948973 | Gate-all-around field-effect transistor device | Huan-Chieh Su, Shi Ning Ju, Kuan-Ting Pan, Chih-Hao Wang | 2024-04-02 |