Issued Patents 2024
Showing 76–95 of 95 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11942377 | Gate structure and patterning method | Lung-Kun Chu, Mao-Lin Huang, Wei-Hao Wu | 2024-03-26 |
| 11942513 | Semiconductor structure and method of fabricating the semiconductor structure | Guan-Lin Chen, Chih-Hao Wang, Shi Ning Ju, Jui-Chien Huang | 2024-03-26 |
| 11942478 | Semiconductor device structure and methods of forming the same | Jui-Chien Huang, Chih-Hao Wang, Shi Ning Ju, Guan-Lin Chen | 2024-03-26 |
| 11929287 | Dielectric liner for field effect transistors | Zhi-Chang Lin, Shih-Cheng Chen, Kuan-Ting Pan, Jung-Hung Chang, Lo-Heng Chang +1 more | 2024-03-12 |
| 11929413 | Semiconductor device structure with metal gate stack | Jia-Chuan You, Huan-Chieh Su, Chih-Hao Wang | 2024-03-12 |
| 11923361 | Semiconductor device with isolation structure | Shi Ning Ju, Kuan-Lun Cheng, Chih-Hao Wang | 2024-03-05 |
| 11916122 | Gate all around transistor with dual inner spacers | Zhi-Chang Lin, Kuan-Ting Pan, Shih-Cheng Chen, Jung-Hung Chang, Lo-Heng Chang +1 more | 2024-02-27 |
| 11916125 | Semiconductor device with backside self-aligned power rail and methods of forming the same | Chih-Chao Chou, Shi Ning Ju, Wen-Ting Lan, Chih-Hao Wang | 2024-02-27 |
| 11916072 | Gate isolation structure | Jia-Chuan You, Chia-Hao Chang, Kuan-Lun Cheng, Chih-Hao Wang | 2024-02-27 |
| 11901364 | Semiconductor device structure and methods of forming the same | Jung-Hung Chang, Zhi-Chang Lin, Shih-Cheng Chen, Chien Ning Yao, Chih-Hao Wang | 2024-02-13 |
| 11901456 | FinFET devices with a backside power rail and a backside self-aligned via disposed between dielectric fins | Shi Ning Ju, Chih-Hao Wang, Kuan-Lun Cheng | 2024-02-13 |
| 11901361 | Semiconductor structure and method for forming the same | Jia-Ni Yu, Lung-Kun Chu, Chung-Wei Hsu, Chih-Hao Wang, Mao-Lin Huang | 2024-02-13 |
| 11894460 | Semiconductor device having nanosheet transistor and methods of fabrication thereof | Chung-Wei Hsu, Mao-Lin Huang, Lung-Kun Chu, Jia-Ni Yu, Kuan-Lun Cheng +1 more | 2024-02-06 |
| 11894367 | Integrated circuit including dipole incorporation for threshold voltage tuning in transistors | Lung-Kun Chu, Mao-Lin Huang, Chung-Wei Hsu, Jia-Ni Yu, Kuan-Lun Cheng +1 more | 2024-02-06 |
| 11876119 | Semiconductor device with gate isolation features and fabrication method of the same | Jung-Chien Cheng, Shi Ning Ju, Guan-Lin Chen, Jia-Chuan You, Chia-Hao Chang +2 more | 2024-01-16 |
| 11869955 | Integrated circuit with nanosheet transistors with robust gate oxide | Jia-Ni Yu, Mao-Lin Huang, Lung-Kun Chu, Chung-Wei Hsu, Chih-Hao Wang +1 more | 2024-01-09 |
| 11862634 | Nanostructure with various widths | Hsiao-Han Liu, Chih-Hao Wang, Shi Ning Ju, Kuan-Lun Cheng | 2024-01-02 |
| 11862734 | Self-aligned spacers for multi-gate devices and method of fabrication thereof | Shi Ning Ju, Guan-Lin Chen, Kuan-Lun Cheng, Chih-Hao Wang | 2024-01-02 |
| 11862700 | Semiconductor device structure including forksheet transistors and methods of forming the same | Jia-Ni Yu, Mao-Lin Huang, Lung-Kun Chu, Chung-Wei Hsu, Chun-Fu Lu +2 more | 2024-01-02 |
| 11862633 | Work function design to increase density of nanosheet devices | Mao-Lin Huang, Chih-Hao Wang, Jia-Ni Yu, Lung-Kun Chu, Chung-Wei Hsu | 2024-01-02 |