Issued Patents 2024
Showing 1–13 of 13 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12148673 | FinFET devices and methods of forming the same | Chih-Hao Wang, Jui-Chien Huang, Kuo-Cheng Ching, Pei-Hsun Wang | 2024-11-19 |
| 12148836 | Gate-all-around structure and methods of forming the same | Pei-Hsun Wang, Chih-Hao Wang | 2024-11-19 |
| 12125897 | Air spacers in transistors and methods forming same | Yi-Lun Chen, Chao-Hsien Huang, Li-Te Lin | 2024-10-22 |
| 12119270 | Hybrid source drain regions formed based on same fin and methods forming same | Pei-Hsun Wang, Shih-Cheng Chen, Chih-Hao Wang | 2024-10-15 |
| 12119404 | Gate all around structure with additional silicon layer and method for forming the same | Chen-Han Wang, Pei-Hsun Wang, Chih-Hao Wang | 2024-10-15 |
| 12087841 | Method of manufacturing gate spacers with stepped sidewalls by removing vertical portions of a helmet layer | Yi-Lun Chen, Bau-Ming Wang | 2024-09-10 |
| 12009216 | Methods of forming silicide contact in field-effect transistors | Shih-Cheng Chen, Chih-Hao Wang, Jung-Hung Chang, Jui-Chien Huang | 2024-06-11 |
| 12009215 | Semiconductor device structure with silicide layer | Jung-Hung Chang, Shih-Cheng Chen, Kuo-Cheng Chiang, Chih-Hao Wang | 2024-06-11 |
| 11996483 | FET with wrap-around silicide and fabrication methods thereof | Pei-Hsun Wang, Chih-Chao Chou, Shih-Cheng Chen, Jung-Hung Chang, Jui-Chien Huang +1 more | 2024-05-28 |
| 11984363 | Dual silicide structure and methods thereof | Shih-Cheng Chen, Chih-Hao Wang | 2024-05-14 |
| 11961892 | Contacts for highly scaled transistors | Carlos H. Diaz, Chung-Cheng Wu, Chia-Hao Chang, Chih-Hao Wang, Jean-Pierre Colinge +2 more | 2024-04-16 |
| 11929417 | Contacts for highly scaled transistors | Carlos H. Diaz, Chung-Cheng Wu, Chia-Hao Chang, Chih-Hao Wang, Jean-Pierre Colinge +2 more | 2024-03-12 |
| 11901424 | Semiconductor device | Shih-Cheng Chen, Chih-Hao Wang | 2024-02-13 |