Issued Patents 2024
Showing 1–25 of 95 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12183678 | Backside power rail structure and methods of forming same | Shi Ning Ju, Chih-Chao Chou, Wen-Ting Lan, Chih-Hao Wang | 2024-12-31 |
| 12183799 | Semiconductor device with gate isolation features and fabrication method of the same | Jung-Chien Cheng, Shi Ning Ju, Guan-Lin Chen, Jia-Chuan You, Chia-Hao Chang +2 more | 2024-12-31 |
| 12183733 | Semiconductor device structure and methods of forming the same | Jia-Chuan You, Shi Ning Ju, Chih-Hao Wang | 2024-12-31 |
| 12176391 | Semiconductor device structure having an isolation layer to isolate a conductive feature and a gate electrode layer | Lung-Kun Chu, Mao-Lin Huang, Chung-Wei Hsu, Jia-Ni Yu, Kuan-Lun Cheng +1 more | 2024-12-24 |
| 12170334 | Isolation structures and methods of forming the same in field-effect transistors | Shi Ning Ju, Guan-Lin Chen, Chih-Hao Wang, Kuan-Lun Cheng | 2024-12-17 |
| 12170279 | Hybrid semiconductor device | Jung-Chien Cheng, Shi Ning Ju, Guan-Lin Chen, Chih-Hao Wang, Kuan-Lun Cheng | 2024-12-17 |
| 12170203 | Integrated circuit with conductive via formation on self-aligned gate metal cut | Jia-Chuan You, Chia-Hao Chang, Chu-Yuan Hsu, Chih-Hao Wang | 2024-12-17 |
| 12170231 | Gate-all-around device with trimmed channel and dipoled dielectric layer and methods of forming the same | Chung-Wei Hsu, Kuan-Lun Cheng, Hou-Yu Chen, Ching-Wei Tsai, Chih-Hao Wang +3 more | 2024-12-17 |
| 12165926 | FinFET device structure having dielectric features between a plurality of gate electrodes and methods of forming the same | Kuan-Ting Pan, Shang-Wen Chang, Ching-Wei Tsai, Kuan-Lun Cheng, Chih-Hao Wang | 2024-12-10 |
| 12166100 | Nanosheet device with dipole dielectric layer and methods of forming the same | Chung-Wei Hsu, Lung-Kun Chu, Mao-Lin Huang, Jia-Ni Yu, Chih-Hao Wang | 2024-12-10 |
| 12166036 | Multi-gate device and related methods | Li-Yang Chuang, Jia-Chuan You, Chih-Hao Wang | 2024-12-10 |
| 12159912 | Integrated circuit including spacer structure for transistors | Chia-Hao Chang, Jia-Chuan You, Chu-Yuan Hsu, Chih-Hao Wang | 2024-12-03 |
| 12148750 | Work function design to increase density of nanosheet devices | Mao-Lin Huang, Chih-Hao Wang, Jia-Ni Yu, Lung-Kun Chu, Chung-Wei Hsu | 2024-11-19 |
| 12148812 | Nano-sheet-based devices having inner spacer structures or gate portions with variable dimensions | Jui-Chien Huang, Chih-Hao Wang, Shi Ning Ju, Guan-Lin Chen | 2024-11-19 |
| 12142692 | Semiconductor device with isolation structure | Huan-Chieh Su, Kuan-Ting Pan, Shi Ning Ju, Chih-Hao Wang | 2024-11-12 |
| 12142685 | FinFET device with high-K metal gate stack | Ka-Hing Fung, Chih-Sheng Chang, Zhiqiang Wu | 2024-11-12 |
| 12132115 | Semiconductor device structure with dielectric stressor | Shi Ning Ju, Guan-Lin Chen, Chih-Hao Wang | 2024-10-29 |
| 12125877 | Nanostructure field-effect transistor device with dielectric layer for reducing substrate leakage or well isolation leakage and methods of forming | Guan-Lin Chen, Shi Ning Ju, Jung-Chien Cheng, Chih-Hao Wang, Kuan-Lun Cheng | 2024-10-22 |
| 12119391 | Fin-based semiconductor device structure including self-aligned contacts and method for forming the same | Mao-Lin Huang, Lung-Kun Chu, Chung-Wei Hsu, Jia-Ni Yu, Chun-Fu Lu +2 more | 2024-10-15 |
| 12113132 | Metal rail conductors for non-planar semiconductor devices | Chih-Liang Chen, Chih-Ming Lai, Ching-Wei Tsai, Charles Chew-Yuen Young, Jiann-Tyng Tzeng +5 more | 2024-10-08 |
| 12107169 | Contact structure for stacked multi-gate device | Zhi-Chang Lin, Shih-Cheng Chen, Jung-Hung Chang, Chien Ning Yao, Chih-Hao Wang | 2024-10-01 |
| 12107131 | Gate-all-around devices having self-aligned capping between channel and backside power rail | Chung-Wei Hsu, Lung-Kun Chu, Mao-Lin Huang, Jia-Ni Yu, Kuan-Lun Cheng +1 more | 2024-10-01 |
| 12107087 | Semiconductor device with gate isolation structure and method for forming the same | Jung-Chien Cheng, Shi Ning Ju, Guan-Lin Chen, Chih-Hao Wang, Kuan-Lun Cheng | 2024-10-01 |
| 12107006 | Method for manufacturing semiconductor structure with dielectric feature | Jia-Chuan You, Chia-Hao Chang, Kuan-Ting Pan, Shi Ning Ju, Chih-Hao Wang | 2024-10-01 |
| 12100770 | Field effect transistor with gate isolation structure and method | Shi Ning Ju, Chih-Hao Wang, Kuan-Lun Cheng, Guan-Lin Chen, Kuan-Ting Pan | 2024-09-24 |