Issued Patents 2024
Showing 1–17 of 17 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12170277 | Integrated circuit and manufacturing method of the same | Jiann-Tyng Tzeng | 2024-12-17 |
| 12148754 | Integrated circuit structure with hybrid cell design | Jiann-Tyng Tzeng | 2024-11-19 |
| 12132049 | Integrated circuit device with high mobility and system of forming the integrated circuit | Shang-Wei Fang, Jiann-Tyng Tzeng, CHEW-YUEN YOUNG | 2024-10-29 |
| 12131998 | Integrated circuit, system and method of forming same | Te-Hsin Chiu, Shih-Wei Peng, Wei-Cheng Lin, Jiann-Tyng Tzeng | 2024-10-29 |
| 12113014 | Integrated circuit including supervia and method of making | Wei-Cheng Lin, Jiann-Tyng Tzeng | 2024-10-08 |
| 12107045 | Middle-end-of-line strap for standard cell | Meng-Hung Shen, Chih-Liang Chen, Charles Chew-Yuen Young, Jiann-Tyng Tzeng, Wei-Cheng Lin | 2024-10-01 |
| 12039246 | Circuit layout | Shih-Wei Peng, Jiann-Tyng Tzeng | 2024-07-16 |
| 12034076 | Semiconductor device integrating backside power grid and related integrated circuit and fabrication method | Chih-Liang Chen, Lei-Chun Chou, Jack Liu, Hui-Ting Yang, Wei-Cheng Lin +3 more | 2024-07-09 |
| 12021083 | Fin field-effect transistor and method of forming the same | Te-Hsin Chiu, Jiann-Tyng Tzeng | 2024-06-25 |
| 11984443 | Power distribution network | Jiann-Tyng Tzeng, Wei-Cheng Lin | 2024-05-14 |
| 11942413 | Decoupling capacitors with back side power rails | Jiann-Tyng Tzeng | 2024-03-26 |
| 11935825 | Contact structure, method, layout, and system | Cheng-Chi Chuang, Chih-Ming Lai, Jiann-Tyng Tzeng, Wei-Cheng Lin, Lipen Yuan | 2024-03-19 |
| 11916070 | Semiconductor structure with nanosheets | Te-Hsin Chiu, Shang-Wei Fang, Wei-Cheng Lin, Jiann-Tyng Tzeng | 2024-02-27 |
| 11908538 | Cell structures and power routing for integrated circuits | Shih-Wei Peng, Jiann-Tyng Tzeng | 2024-02-20 |
| 11909396 | Integrated circuit including back side conductive lines for clock signals | Jiun-Wei Lu | 2024-02-20 |
| 11893333 | Hybrid sheet layout, method, system, and structure | Shang-Wei Fang, Wei-Cheng Lin, Jiann-Tyng Tzeng, Lee-Chung Lu, Yi-Kan Cheng +1 more | 2024-02-06 |
| 11862623 | Semiconductor device including source/drain contact having height below gate stack | Charles Chew-Yuen Young, Chih-Liang Chen, Chih-Ming Lai, Jiann-Tyng Tzeng, Shun Li Chen +3 more | 2024-01-02 |