Issued Patents 2024
Showing 1–11 of 11 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12137574 | Integration of ferroelectric memory devices having stacked electrodes with transistors | Sasikanth Manipatruni, Rajeev Kumar Dokania, Ramamoorthy Ramesh, Amrita Mathuriya | 2024-11-05 |
| 12113097 | Ferroelectric capacitor integrated with logic | Sasikanth Manipatruni, Rajeev Kumar Dokania, Ramamoorthy Ramesh, Amrita Mathuriya | 2024-10-08 |
| 12088297 | Majority gate based low power ferroelectric based adder with reset mechanism | Sasikanth Manipatruni, Yuan-Sheng Fang, Robert Menezes, Rajeev Kumar Dokania, Ramamoorthy Ramesh +1 more | 2024-09-10 |
| 12046517 | Self-aligned 3-D epitaxial structures for MOS device fabrication | Glenn A. Glass, Daniel B. Aubertine, Anand S. Murthy, Tahir Ghani | 2024-07-23 |
| 11949017 | Doped polar layers and semiconductor device incorporating same | Ramesh Ramamoorthy, Sasikanth Manipatruni | 2024-04-02 |
| 11949018 | Doped polar layers and semiconductor device incorporating same | Ramesh Ramamoorthy, Sasikanth Manipatruni | 2024-04-02 |
| 11916149 | Doped polar layers and semiconductor device incorporating same | Ramesh Ramamoorthy, Sasikanth Manipatruni | 2024-02-27 |
| 11908943 | Manganese-doped perovskite layers and semiconductor device incorporating same | Ramesh Ramamoorthy, Sasikanth Manipatruni | 2024-02-20 |
| 11888066 | Doped polar layers and semiconductor device incorporating same | Ramesh Ramamoorthy, Sasikanth Manipatruni | 2024-01-30 |
| 11888067 | B-site doped perovskite layers and semiconductor device incorporating same | Ramesh Ramamoorthy, Sasikanth Manipatruni | 2024-01-30 |
| 11863183 | Low power non-linear polar material based threshold logic gate multiplier | Sasikanth Manipatruni, Yuan-Sheng Fang, Robert Menezes, Rajeev Kumar Dokania, Ramamoorthy Ramesh +1 more | 2024-01-02 |