Issued Patents 2024
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12126339 | Apparatus with selectable majority gate and combinational logic gate outputs | Sasikanth Manipatruni, Rafael Rios, Ikenna Odinaka, Rajeev Kumar Dokania, Ramamoorthy Ramesh +1 more | 2024-10-22 |
| 12107579 | Method for conditioning majority or minority gate | Rajeev Kumar Dokania, Amrita Mathuriya, Rafael Rios, Ikenna Odinaka, Ramamoorthy Ramesh +1 more | 2024-10-01 |
| 12088297 | Majority gate based low power ferroelectric based adder with reset mechanism | Sasikanth Manipatruni, Yuan-Sheng Fang, Rajeev Kumar Dokania, Gaurav Thareja, Ramamoorthy Ramesh +1 more | 2024-09-10 |
| 11863183 | Low power non-linear polar material based threshold logic gate multiplier | Sasikanth Manipatruni, Yuan-Sheng Fang, Rajeev Kumar Dokania, Gaurav Thareja, Ramamoorthy Ramesh +1 more | 2024-01-02 |