Issued Patents 2024
Showing 1–18 of 18 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12155383 | Reset mechanism for an adder or a multiplier having paraelectric material | Amrita Mathuriya, Rafael Rios, Rajeev Kumar Dokania, Sasikanth Manipatruni | 2024-11-26 |
| 12147747 | Area oriented logic synthesis | Sasikanth Manipatruni, Darshak Doshi, Rajeev Kumar Dokania, Amrita Mathuriya | 2024-11-19 |
| 12126339 | Apparatus with selectable majority gate and combinational logic gate outputs | Sasikanth Manipatruni, Rafael Rios, Robert Menezes, Rajeev Kumar Dokania, Ramamoorthy Ramesh +1 more | 2024-10-22 |
| 12118330 | Low power multiplier with non-linear polar material based reset mechanism with sequential reset | Amrita Mathuriya, Rafael Rios, Rajeev Kumar Dokania, Sasikanth Manipatruni | 2024-10-15 |
| 12118327 | Ripple carry adder with inverted ferroelectric or paraelectric based adders | Amrita Mathuriya, Rajeev Kumar Dokania, Rafael Rios, Sasikanth Manipatruni | 2024-10-15 |
| 12107579 | Method for conditioning majority or minority gate | Rajeev Kumar Dokania, Amrita Mathuriya, Rafael Rios, Robert Menezes, Ramamoorthy Ramesh +1 more | 2024-10-01 |
| 12015402 | Asynchronous consensus circuit with stacked ferroelectric non-planar capacitors | Amrita Mathuriya, Nabil Imam, Rafael Rios, Rajeev Kumar Dokania, Sasikanth Manipatruni | 2024-06-18 |
| 12009820 | Asynchronous consensus circuit with majority gate based on non-linear capacitors | Amrita Mathuriya, Nabil Imam, Rafael Rios, Rajeev Kumar Dokania, Sasikanth Manipatruni | 2024-06-11 |
| 11985831 | Multi-function threshold gate with input based adaptive threshold and with stacked non-planar ferroelectric capacitors | Amrita Mathuriya, Rafael Rios, Rajeev Kumar Dokania, Debo Olaosebikan, Sasikanth Manipatruni | 2024-05-14 |
| 11979148 | Asynchronous consensus circuit with stacked linear or paraelectric planar capacitors | Amrita Mathuriya, Nabil Imam, Rafael Rios, Rajeev Kumar Dokania, Sasikanth Manipatruni | 2024-05-07 |
| 11967954 | Majority or minority logic gate with non-linear input capacitors without reset | Amrita Mathuriya, Rafael Rios, Darshak Doshi, Rajeev Kumar Dokania, Sasikanth Manipatruni | 2024-04-23 |
| 11922105 | Computer-aided design tool for minimum gate count initialization | Sasikanth Manipatruni, Darshak Doshi, Rajeev Kumar Dokania, Amrita Mathuriya | 2024-03-05 |
| 11909391 | Asynchronous completion tree circuit using multi-function threshold gate with input based adaptive threshold | Amrita Mathuriya, Nabil Imam, Rafael Rios, Rajeev Kumar Dokania, Sasikanth Manipatruni | 2024-02-20 |
| 11901891 | Asynchronous consensus circuit with stacked ferroelectric planar capacitors | Amrita Mathuriya, Nabil Imam, Rafael Rios, Rajeev Kumar Dokania, Sasikanth Manipatruni | 2024-02-13 |
| 11888479 | Non-linear polar material based low power multiplier with NOR and NAND gate based reset mechanism | Amrita Mathuriya, Rafael Rios, Rajeev Kumar Dokania, Sasikanth Manipatruni | 2024-01-30 |
| 11861279 | Computer-aided design tool for inverter minimization | Sasikanth Manipatruni, Darshak Doshi, Rajeev Kumar Dokania, Amrita Mathuriya | 2024-01-02 |
| 11863184 | Asynchronous validity tree circuit using multi-function threshold gate with input based adaptive threshold | Amrita Mathuriya, Nabil Imam, Rafael Rios, Rajeev Kumar Dokania, Sasikanth Manipatruni | 2024-01-02 |
| 11861278 | Computer-aided design tool for gate pruning | Sasikanth Manipatruni, Darshak Doshi, Rajeev Kumar Dokania, Amrita Mathuriya | 2024-01-02 |