Issued Patents 2024
Showing 1–6 of 6 patents
| Patent # | Title | Co-Inventors | Date | Approx Value ⓘ |
|---|---|---|---|---|
| 12165700 | SRAM power savings and write assist | Russell Schreiber, Keith Kasprak | 2024-12-10 | $237,856,000 |
| 12107076 | Through-silicon via layout for multi-die integrated circuits | Wonjun Jung, Jasmeet Singh Narang, Tyrone Tung Huang, Christopher Klement, Alan Dodson Smith +1 more | 2024-10-01 | $299,271,000 |
| 12073919 | Dual read port latch array bitcell | Arijit Banerjee, Russell Schreiber | 2024-08-27 | $259,969,000 |
| 12045469 | Single event upset tolerant memory device | Kumar Rahul, Santosh Yachareni, Nui Chong, Cheang-Whang Chang | 2024-07-23 | |
| 12033721 | Split read port latch array bit cell | Arijit Banerjee, Russell Schreiber | 2024-07-09 | $258,431,000 |
| 11869874 | Stacked die circuit routing system and method | David Johnson | 2024-01-09 | $241,234,000 |