Issued Patents 2023
Showing 1–25 of 52 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11856783 | Semiconductor memory devices with different thicknesses of word lines and methods of manufacturing thereof | Peng-Chun Liou, Ya-Yun Cheng, Yi-Ching Liu, Chia-En Huang | 2023-12-26 |
| 11856787 | Semiconductor device and method of manufacture | Sai-Hooi Yeong, Chi On Chui | 2023-12-26 |
| 11856767 | Method for improving control gate uniformity during manufacture of processors with embedded flash memory | Wei-Cheng Wu | 2023-12-26 |
| 11854914 | Systems and methods of testing memory devices | Chia-En Huang | 2023-12-26 |
| 11856796 | Semiconductor memory devices and methods of manufacturing thereof | Chia-En Huang | 2023-12-26 |
| 11855162 | Contacts for semiconductor devices and methods of forming the same | Sai-Hooi Yeong, Chi On Chui | 2023-12-26 |
| 11854863 | Semiconductor device including an isolation region having an edge being covered and manufacturing method for the same | Te-An Chen | 2023-12-26 |
| 11855080 | Semiconductor device and method of fabricating the same | Te-An Chen | 2023-12-26 |
| 11854823 | Integrated circuit device | Chih-Ren Hsieh, Chih-Pin Huang, Ching-Wen Chan | 2023-12-26 |
| 11848381 | Methods of operating multi-bit memory storage device | Chia-En Huang, Han-Jong Chia, Martin Liu, Sai-Hooi Yeong, Yih Wang | 2023-12-19 |
| 11844224 | Memory structure and method of forming the same | Shih-Hsuan Chien, Han-Wei Wu, Feng-Cheng Yang | 2023-12-12 |
| 11837536 | Semiconductor memory structure and interconnect structure of semiconductor memory structure | Sai-Hooi Yeong, Chenchen Jacob Wang | 2023-12-05 |
| 11810959 | Transistor layout to reduce kink effect | Te-Hsin Chiu, Wei-Cheng Wu | 2023-11-07 |
| 11805652 | 3D RAM SL/BL contact modulation | Sheng-Chen Wang, Feng-Cheng Yang, Han-Jong Chia | 2023-10-31 |
| 11798809 | Semiconductor device and method of manufacturing | Sai-Hooi Yeong, Chi On Chui | 2023-10-24 |
| 11799006 | Mask-free process for improving drain to gate breakdown voltage in semiconductor devices | Te-An Chen | 2023-10-24 |
| 11778815 | Semiconductor device and manufacturing method thereof | Te-An Chen | 2023-10-03 |
| 11776602 | Memory array staircase structure | Han-Jong Chia, Sheng-Chen Wang, Feng-Cheng Yang, Yu-Ming Lin, Chung-Te Lin | 2023-10-03 |
| 11765906 | Memory devices with shorten ferroelectric segments and methods of manufacturing thereof | Chia-En Huang | 2023-09-19 |
| 11758717 | Semiconductor memory devices with one-sided staircase profiles and methods of manufacturing thereof | Chia-En Huang | 2023-09-12 |
| 11758733 | 3D memory multi-stack connection method | Chia-En Huang, Ya-Hui Wu | 2023-09-12 |
| 11758735 | Common-connection method in 3D memory | Chia-En Huang, Yi-Ching Liu | 2023-09-12 |
| 11758734 | Semiconductor memory devices and methods of manufacturing thereof | Peng-Chun Liou, Zhiqiang Wu, Ya-Yun Cheng, Yi-Ching Liu | 2023-09-12 |
| 11749623 | Semiconductor memory devices and methods of manufacturing thereof | Chia-En Huang | 2023-09-05 |
| 11744080 | Three-dimensional memory device with word lines extending through sub-arrays, semiconductor device including the same and method for manufacturing the same | Han-Jong Chia, Yi-Ching Liu, Chia-En Huang, Sheng-Chen Wang, Feng-Cheng Yang +1 more | 2023-08-29 |