Issued Patents 2023
Showing 1–14 of 14 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11855142 | Supportive layer in source/drains of FinFET devices | Jung-Chi Tai, Pei-Ren Jeng, Yen-Ru Lee, Yan-Ting Lin, Chih-Yun Chin | 2023-12-26 |
| 11854901 | Semiconductor method and device | Cheng-Hsiung Yen, Ta-Chun Ma, Chien-Chang Su, Jung-Jen Chen, Pei-Ren Jeng +1 more | 2023-12-26 |
| 11824120 | Method of fabricating a source/drain recess in a semiconductor device | Eric Peng, Chao-Cheng Chen, Ming-Hua Yu, Shih-Hao Lo, Syun-Ming Jang +2 more | 2023-11-21 |
| 11773506 | Wafer susceptor with improved thermal characteristics | Yi-Hung Lin, Jr-Hung Li, Chang-Shen Lu, Tze-Liang Lee | 2023-10-03 |
| 11749752 | Doping profile for strained source/drain region | Hsueh-Chang Sung, Tsz-Mei Kwok, Kun-Mu Li, Tze-Liang Lee | 2023-09-05 |
| 11735660 | Method of forming semiconductor device | Wei-Yang Lee, Ting-Yeh Chen, Feng-Cheng Yang | 2023-08-22 |
| 11735668 | Interfacial layer between fin and source/drain region | Chih-Yun Chin, Chien-Wei Lee, Hsueh-Chang Sung, Heng-Wen Ting, Roger Tai +5 more | 2023-08-22 |
| 11728208 | FETS and methods of forming FETS | Yen-Ru Lee, Chien-I Kuo, Li-Li Su, Chien-Chang Su, Heng-Wen Ting +3 more | 2023-08-15 |
| 11710777 | Semiconductor device and method for manufacture | Chia-Ao Chang, De-Wei Yu, Yee-Chia Yeo, Hsueh-Chang Sung, Pei-Ren Jeng | 2023-07-25 |
| 11652105 | Epitaxy regions with large landing areas for contact plugs | Jung-Chi Tai, Yi-Fang Pai, Tsz-Mei Kwok, Tsung-Hsi Yang, Jeng-Wei Yu +5 more | 2023-05-16 |
| 11600715 | FETs and methods of forming FETs | Tzu-Ching Lin, Chien-I Kuo, Wei Te Chiang, Wei Hao Lu, Li-Li Su | 2023-03-07 |
| 11581425 | Method for manufacturing semiconductor structure with enlarged volumes of source-drain regions | Tsung-Hsi Yang, Che-Yu Lin, Yi-Fang Pai, Pei-Ren Jeng, Yee-Chia Yeo | 2023-02-14 |
| 11575026 | Source/drain structure for semiconductor device | Chien-Wei Lee, Heng-Wen Ting, Yee-Chia Yeo, Yen-Ru Lee, Chih-Yun Chin +2 more | 2023-02-07 |
| 11569084 | Method for manufacturing semiconductor structure with reduced nodule defects | Che-Yu Lin, Chih-Chiang Chang, Chien-Hung Chen, Ming-Hua Yu, Tsung-Hsi Yang +2 more | 2023-01-31 |