Issued Patents 2023
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11822484 | Low power cache | Vydhyanathan Kalyanasundharam, Chintan S. Patel | 2023-11-21 |
| 11804479 | Scheme for enabling die reuse in 3D stacked products | Milind S. Bhagavat, Brett P. Wilkerson, Rahul Agarwal | 2023-10-31 |
| 11715514 | Latch bit cells | Russell Schreiber | 2023-08-01 |
| 11710698 | Dual-track bitline scheme for 6T SRAM cells | Richard T. Schultz | 2023-07-25 |
| 11676659 | Memory with expandable row width | Martin Paul Piorkowski | 2023-06-13 |
| 11610627 | Write masked latch bit cell | Russell Schreiber | 2023-03-21 |