RD

Rajeev Kumar Dokania

KC Kepler Computing: 42 patents #2 of 19Top 15%
📍 Beaverton, OR: #5 of 491 inventorsTop 2%
🗺 Oregon: #15 of 4,240 inventorsTop 1%
Overall (2022): #375 of 548,613Top 1%
42
Patents 2022

Issued Patents 2022

Showing 26–42 of 42 patents

Patent #TitleCo-InventorsDate
11423967 Stacked ferroelectric non-planar capacitors in a memory bit-cell Noriyuki Sato, Tanay Gosavi, Pratyush Pandey, Debo Olaosebikan, Amrita Mathuriya +1 more 2022-08-23
11418197 Majority logic gate having paraelectric input capacitors and a local conditioning mechanism Amrita Mathuriya, Rafael Rios, Ikenna Odinaka, Robert Menezes, Ramamoorthy Ramesh +1 more 2022-08-16
11394387 2-input NAND gate with non-linear input capacitors Sasikanth Manipatruni, Rafael Rios, Neal Reynolds, Ikenna Odinaka, Robert Menezes +2 more 2022-07-19
11381244 Low power ferroelectric based majority logic gate multiplier Sasikanth Manipatruni, Yuan-Sheng Fang, Robert Menezes, Gaurav Thareja, Ramamoorthy Ramesh +1 more 2022-07-05
11374574 Linear input and non-linear output threshold logic gate Sasikanth Manipatruni, Robert Menezes, Yuan-Sheng Fang, Gaurav Thareja, Ramamoorthy Ramesh +1 more 2022-06-28
11374575 Majority logic gate with non-linear input capacitors and conditioning logic Amrita Mathuriya, Rafael Rios, Ikenna Odinaka, Robert Menezes, Ramamoorthy Ramesh +1 more 2022-06-28
11373728 Method for improving memory bandwidth through read and restore decoupling Christopher B. Wilkerson, Sasikanth Manipatruni, Amrita Mathuriya 2022-06-28
11373727 Apparatus for improving memory bandwidth through read and restore decoupling Christopher B. Wilkerson, Sasikanth Manipatruni, Amrita Mathuriya 2022-06-28
11366589 Efficient method for improving memory bandwidth through read and restore decoupling using restore buffer Christopher B. Wilkerson, Sasikanth Manipatruni, Amrita Mathuriya 2022-06-21
11303280 Ferroelectric or paraelectric based sequential circuit Amrita Mathuriya, Ikenna Odinaka, Rafael Rios, Sasikanth Manipatruni 2022-04-12
11295796 Apparatus and method for endurance of non-volatile memory banks via wear leveling and random swap injection Christopher B. Wilkerson, Sasikanth Manipatruni, Amrita Mathuriya 2022-04-05
11296708 Low power ferroelectric based majority logic gate adder Sasikanth Manipatruni, Yuan-Sheng Fang, Robert Menezes, Gaurav Thareja, Ramamoorthy Ramesh +1 more 2022-04-05
11289497 Integration method of ferroelectric memory array Gaurav Thareja, Sasikanth Manipatruni, Ramamoorthy Ramesh, Amrita Mathuriya 2022-03-29
11290112 Majority logic gate based XOR logic gate with non-linear input capacitors Sasikanth Manipatruni, Rafael Rios, Neal Reynolds, Ikenna Odinaka, Robert Menezes +2 more 2022-03-29
11290111 Majority logic gate based and-or-invert logic gate with non-linear input capacitors Sasikanth Manipatruni, Rafael Rios, Neal Reynolds, Ikenna Odinaka, Robert Menezes +2 more 2022-03-29
11283453 Low power ferroelectric based majority logic gate carry propagate and serial adder Sasikanth Manipatruni, Yuan-Sheng Fang, Robert Menezes, Gaurav Thareja, Ramamoorthy Ramesh +1 more 2022-03-22
11277137 Majority logic gate with non-linear input capacitors Sasikanth Manipatruni, Rafael Rios, Neal Reynolds, Ikenna Odinaka, Robert Menezes +2 more 2022-03-15