Issued Patents 2021
Showing 1–12 of 12 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11211473 | Epitaxial fin structures having an epitaxial buffer region and an epitaxial capping region | Kun-Mu Li | 2021-12-28 |
| 11171209 | Semiconductor device and method of manufacture | Heng-Wen Ting, Kei-Wei Chen, Chii-Horng Li, Pei-Ren Jeng, Yen-Ru Lee +1 more | 2021-11-09 |
| 11164944 | Method of manufacturing a semiconductor device | Heng-Wen Ting | 2021-11-02 |
| 11158508 | Barrier layer above anti-punch through (APT) implant region to improve mobility of channel region of fin field effect transistor (finFET) device structure | Tsung-Yao Wen, Sheng-Chen Wang, Sai-Hooi Yeong, Ya-Yun Cheng | 2021-10-26 |
| 11145759 | Silicon germanium p-channel finFET stressor structure and method of making same | Liang Chen | 2021-10-12 |
| 11133416 | Methods of forming semiconductor devices having plural epitaxial layers | Yan-Ting Lin, Yen-Ru Lee | 2021-09-28 |
| 11107923 | Source/drain regions of FinFET devices and methods of forming same | Kun-Mu Li, Heng-Wen Ting, Yen-Ru Lee | 2021-08-31 |
| 11075120 | FinFET device and method | Kun-Mu Li, Heng-Wen Ting, Yen-Ru Lee, Chien-Wei Lee | 2021-07-27 |
| 11063152 | Semiconductor device and method | Chien-Wei Lee, Yen-Ru Lee, Jyun-Chih Lin, Tzu-Hsiang Hsu, Feng-Cheng Yang | 2021-07-13 |
| 10950725 | Epitaxial source/drain structure and method of forming same | Kun-Mu Li | 2021-03-16 |
| 10944005 | Interfacial layer between fin and source/drain region | Chih-Yun Chin, Chii-Horng Li, Chien-Wei Lee, Heng-Wen Ting, Roger Tai +5 more | 2021-03-09 |
| 10916656 | MOS devices having epitaxy regions with reduced facets | Kun-Mu Li, Tze-Liang Lee, Chii-Horng Li, Tsz-Mei Kwok | 2021-02-09 |