Issued Patents 2021
Showing 1–25 of 31 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11210096 | Vector friendly instruction format and execution thereof | Jesus Corbal San Adrian, Roger Espasa Sans, Robert Dale Cavin, Bret L. Toll, Santiago Galan Duran +14 more | 2021-12-28 |
| 11200055 | Systems, methods, and apparatuses for matrix add, subtract, and multiply | Dan Baum, Zeev Sperber, Jesus Corbal, Elmoustapha Ould-Ahmed-Vall, Bret L. Toll +5 more | 2021-12-14 |
| 11169802 | Systems, apparatuses, and methods for fused multiply add | Galina Ryvchin, Piotr Majcher, Mark J. Charney, Elmoustapha Ould-Ahmed-Vall, Jesus Corbal +4 more | 2021-11-09 |
| 11169800 | Apparatus and method for complex multiplication | Mark J. Charney, Raanan Sade, Elmoustapha Ould-Ahmed-Vall, Jesus Corbal, Roman S. Dubtsov | 2021-11-09 |
| 11163563 | Systems, apparatuses, and methods for dual complex multiply add of signed words | Elmoustapha Ould-Ahmed-Vall, Venkateswara Madduri, Mark J. Charney | 2021-11-02 |
| 11163565 | Systems, methods, and apparatuses for dot production operations | Dan Baum, Zeev Sperber, Jesus Corbal, Elmoustapha Ould-Ahmed-Vall, Bret L. Toll +5 more | 2021-11-02 |
| 11113053 | Data element comparison processors, methods, systems, and instructions | Asit K. Mishra, Edward T. Grochowski, Jonathan Pearce, Deborah T. Marr, Ehud Cohen +5 more | 2021-09-07 |
| 11093247 | Systems and methods to load a tile register pair | Raanan Sade, Simon Rubanovich, Amit Gradstein, Zeev Sperber, Alexander Heinecke +5 more | 2021-08-17 |
| 11093277 | Systems, methods, and apparatuses for heterogeneous computing | Rajesh M. Sankaran, Gilbert Neiger, Narayan Ranganathan, Stephen R. Van Doren, Joseph Nuzman +22 more | 2021-08-17 |
| 11086623 | Systems, methods, and apparatuses for tile matrix multiplication and accumulation | Zeev Sperber, Mark J. Charney, Bret L. Toll, Rinat Rappoport, Stanislav Shwartsman +7 more | 2021-08-10 |
| 11080048 | Systems, methods, and apparatus for tile configuration | Menachem Adelman, Zeev Sperber, Mark J. Charney, Bret L. Toll, Rinat Rappoport +6 more | 2021-08-03 |
| 11074073 | Apparatus and method for multiply, add/subtract, and accumulate of packed data elements | Venkateswara Madduri, Elmoustapha Ould-Ahmed-Vall, Mark J. Charney, Jesus Corbal | 2021-07-27 |
| 11068263 | Systems and methods for performing instructions to convert to 16-bit floating-point format | Alexander Heinecke, Mark J. Charney, Raanan Sade, Menachem Adelman, Zeev Sperber +2 more | 2021-07-20 |
| 11068262 | Systems and methods for performing instructions to convert to 16-bit floating-point format | Alexander Heinecke, Mark J. Charney, Raanan Sade, Menachem Adelman, Zeev Sperber +2 more | 2021-07-20 |
| 11048507 | Compressed instruction format | Doron Orenstein, Bret L. Toll | 2021-06-29 |
| 11048508 | Interruptible and restartable matrix multiplication instructions, processors, methods, and systems | Edward T. Grochowski, Asit K. Mishra, Mark J. Charney, Simon C. Steely, Jr. | 2021-06-29 |
| 11036504 | Systems and methods for performing 16-bit floating-point vector dot product instructions | Alexander Heinecke, Mark J. Charney, Raanan Sade, Menachem Adelman, Zeev Sperber +2 more | 2021-06-15 |
| 11036499 | Systems, apparatuses, and methods for controllable sine and/or cosine operations | Venkateswara Madduri, Elmoustapha Ould-Ahmed-Vall, Jesus Corbal, Mark J. Charney, Carl Murray +2 more | 2021-06-15 |
| 11023231 | Systems and methods for executing a fused multiply-add instruction for complex numbers | Roman S. Dubtsov, Jesus Corbal, Milind B. Girkar, Elmoustapha Ould-Ahmed-Vall | 2021-06-01 |
| 11023382 | Systems, methods, and apparatuses utilizing CPU storage with a memory reference | Raanan Sade, Jason W. Brandt, Mark J. Charney, Joseph Nuzman, Leena K. Puthiyedath +2 more | 2021-06-01 |
| 11023235 | Systems and methods to zero a tile register pair | Raanan Sade, Simon Rubanovich, Amit Gradstein, Zeev Sperber, Alexander Heinecke +6 more | 2021-06-01 |
| 10990396 | Systems for performing instructions to quickly convert and use tiles as 1D vectors | Bret L. Toll, Christopher J. Hughes, Dan Baum, Elmoustapha Ould-Ahmed-Vall, Raanan Sade +2 more | 2021-04-27 |
| 10990397 | Apparatuses, methods, and systems for transpose instructions of a matrix operations accelerator | Amit Gradstein, Simon Rubanovich, Sagi Meller, Zeev Sperber, Jose Yallouz | 2021-04-27 |
| 10977039 | Apparatus and method for performing dual signed and unsigned multiplication of packed data elements | Venkateswara Madduri, Elmoustapha Ould-Ahmed-Vall, Mark J. Charney, Jesus Corbal, Binwei Yang | 2021-04-13 |
| 10970076 | Systems and methods for performing instructions specifying ternary tile logic operations | Elmoustapha Ould-Ahmed-Vall, Christopher J. Hughes, Bret L. Toll, Dan Baum, Raanan Sade +2 more | 2021-04-06 |