Issued Patents 2021
Showing 1–16 of 16 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11169800 | Apparatus and method for complex multiplication | Robert Valentine, Mark J. Charney, Elmoustapha Ould-Ahmed-Vall, Jesus Corbal, Roman S. Dubtsov | 2021-11-09 |
| 11093247 | Systems and methods to load a tile register pair | Simon Rubanovich, Amit Gradstein, Zeev Sperber, Alexander Heinecke, Robert Valentine +5 more | 2021-08-17 |
| 11080048 | Systems, methods, and apparatus for tile configuration | Menachem Adelman, Robert Valentine, Zeev Sperber, Mark J. Charney, Bret L. Toll +6 more | 2021-08-03 |
| 11068263 | Systems and methods for performing instructions to convert to 16-bit floating-point format | Alexander Heinecke, Robert Valentine, Mark J. Charney, Menachem Adelman, Zeev Sperber +2 more | 2021-07-20 |
| 11068262 | Systems and methods for performing instructions to convert to 16-bit floating-point format | Alexander Heinecke, Robert Valentine, Mark J. Charney, Menachem Adelman, Zeev Sperber +2 more | 2021-07-20 |
| 11036501 | Apparatus and method for a range comparison, exchange, and add | Joseph Nuzman, Hubert Nueckel | 2021-06-15 |
| 11036504 | Systems and methods for performing 16-bit floating-point vector dot product instructions | Alexander Heinecke, Robert Valentine, Mark J. Charney, Menachem Adelman, Zeev Sperber +2 more | 2021-06-15 |
| 11023382 | Systems, methods, and apparatuses utilizing CPU storage with a memory reference | Jason W. Brandt, Mark J. Charney, Joseph Nuzman, Leena K. Puthiyedath, Rinat Rappoport +2 more | 2021-06-01 |
| 11023235 | Systems and methods to zero a tile register pair | Simon Rubanovich, Amit Gradstein, Zeev Sperber, Alexander Heinecke, Robert Valentine +6 more | 2021-06-01 |
| 10990396 | Systems for performing instructions to quickly convert and use tiles as 1D vectors | Bret L. Toll, Christopher J. Hughes, Dan Baum, Elmoustapha Ould-Ahmed-Vall, Robert Valentine +2 more | 2021-04-27 |
| 10970076 | Systems and methods for performing instructions specifying ternary tile logic operations | Elmoustapha Ould-Ahmed-Vall, Christopher J. Hughes, Bret L. Toll, Dan Baum, Robert Valentine +2 more | 2021-04-06 |
| 10970072 | Systems and methods to transpose vectors on-the-fly while loading from memory | Alexander Heinecke, Evangelos Georganas, Christopher J. Hughes, Robert Valentine | 2021-04-06 |
| 10963256 | Systems and methods for performing instructions to transform matrices into row-interleaved format | Robert Valentine, Bret L. Toll, Christopher J. Hughes, Alexander Heinecke, Elmoustapha Ould-Ahmed-Vall +1 more | 2021-03-30 |
| 10963246 | Systems and methods for performing 16-bit floating-point matrix dot product instructions | Alexander Heinecke, Robert Valentine, Mark J. Charney, Menachem Adelman, Zeev Sperber +2 more | 2021-03-30 |
| 10929143 | Method and apparatus for efficient matrix alignment in a systolic array | Mike Espig, Bret L. Toll, Bob Valentine, Alexander Heinecke, Christopher J. Hughes | 2021-02-23 |
| 10896043 | Systems for performing instructions for fast element unpacking into 2-dimensional registers | Bret L. Toll, Alexander Heinecke, Christopher J. Hughes, Ronen Zohar, Michael Espig +4 more | 2021-01-19 |