Issued Patents 2021
Showing 1–25 of 41 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11211390 | Staircase patterning for 3D NAND devices | — | 2021-12-28 |
| 11195842 | Vertical non-volatile memory structure with additional bitline in wordline stack | — | 2021-12-07 |
| 11183419 | Unconfined buried interconnects | — | 2021-11-23 |
| 11176451 | Capacitor based resistive processing unit with symmetric weight update | Yulong Li, Paul M. Solomon | 2021-11-16 |
| 11152571 | Compact resistive random access memory integrated with a pass gate transistor | — | 2021-10-19 |
| 11145658 | Semiconductor structures with deep trench capacitor and methods of manufacture | Kevin K. Chan, Sivananda K. Kanakasabapathy, Babar A. Khan, Masaharu Kobayashi, Theodorus E. Standaert +1 more | 2021-10-12 |
| 11114479 | Optoelectronics and CMOS integration on GOI substrate | Ning Li, Devendra K. Sadana | 2021-09-07 |
| 11107821 | Semiconductor structures with deep trench capacitor and methods of manufacture | Kevin K. Chan, Sivananda K. Kanakasabapathy, Babar A. Khan, Masaharu Kobayashi, Theodoras E. Standaert +1 more | 2021-08-31 |
| 11088264 | Self-aligned channel-only semiconductor-on-insulator field effect transistor | — | 2021-08-10 |
| 11079337 | Secure wafer inspection and identification | Fee Li Lie, Richard C. Johnson, Scott D. Halle, Robin Hsin Kuo Chao | 2021-08-03 |
| 11055607 | Neural network using floating gate transistor | — | 2021-07-06 |
| 11056493 | Semiconductor structures with deep trench capacitor and methods of manufacture | Kevin K. Chan, Sivananda K. Kanakasabapathy, Babar A. Khan, Masaharu Kobayashi, Theodorus E. Standaert +1 more | 2021-07-06 |
| 11055611 | Circuit for CMOS based resistive processing unit | Yulong Li, Paul M. Solomon, Chun-Chen Yeh, Seyoung Kim | 2021-07-06 |
| 11055610 | Circuit for CMOS based resistive processing unit | Yulong Li, Paul M. Solomon, Chun-Chen Yeh, Seyoung Kim | 2021-07-06 |
| 11037834 | Simple contact over gate on active area | — | 2021-06-15 |
| 11031346 | Advanced wafer security method including pattern and wafer verifications | Carol Boye, Fee Li Lie, Shravan Kumar Matham, Brad Austin | 2021-06-08 |
| 11024636 | Vertical 3D stack NOR device | — | 2021-06-01 |
| 11018123 | Multi-chip modules | — | 2021-05-25 |
| 11011651 | Tight pitch stack nanowire isolation | — | 2021-05-18 |
| 10997490 | Battery-based neural network weights | Kevin W. Brew, Seyoung Kim, Dennis M. Newns | 2021-05-04 |
| 10998311 | Fabricating gate-all-around transistors having high aspect ratio channels and reduced parasitic capacitance | — | 2021-05-04 |
| 10985280 | Threshold voltage control using channel digital etch | — | 2021-04-20 |
| 10984306 | Battery-based neural network weights | Kevin W. Brew, Seyoung Kim, Dennis M. Newns | 2021-04-20 |
| 10978593 | Threshold voltage control using channel digital etch | — | 2021-04-13 |
| 10971604 | Gate all around fin field effect transistor | — | 2021-04-06 |