LY

Ling-Yen Yeh

TSMC: 15 patents #100 of 3,471Top 3%
Overall (2020): #3,789 of 565,922Top 1%
15
Patents 2020

Issued Patents 2020

Showing 1–15 of 15 patents

Patent #TitleCo-InventorsDate
10879394 Semiconductor device and method of forming the same Carlos H. Diaz 2020-12-29
10872955 Semiconductor device and fabricating method thereof Chun-Chieh Lu, Meng-Hsuan Hsiao, Tung Ying Lee, Chih-Sheng Chang, Carlos H. Diaz 2020-12-22
10872822 Method for manufacturing semiconductor devices Carlos H. Diaz, Wilman Tsai 2020-12-22
10868132 Semiconductor device including standard cells with header/footer switch including negative capacitance Chien-Hsing Lee, Chih-Sheng Chang, Wilman Tsai, Chia-Wen Chang, Carlos H. Diaz 2020-12-15
10861937 Integrated circuit structure and method with solid phase diffusion Cheng-Yi Peng, Chi-Wen Liu, Chih-Sheng Chang, Yee-Chia Yeo 2020-12-08
10854724 One-dimensional nanostructure growth on graphene and devices thereof Che-Wei Yang, Chi-Wen Liu, Hao-Hsiung Lin 2020-12-01
10825899 Semiconductor device and fabricating method thereof Chun-Chieh Lu, Meng-Hsuan Hsiao, Tung Ying Lee, Chih-Sheng Chang, Carlos H. Diaz 2020-11-03
10825933 Gate-all-around structure and manufacturing method for the same Meng-Hsuan Hsiao, Wei-Sheng Yun, Winnie Victoria Wei-Ning Chen, Tung Ying Lee 2020-11-03
10784362 Semiconductor device and manufacturing method thereof Chun-Chieh Lu, Carlos H. Diaz, Chih-Sheng Chang, Cheng-Yi Peng 2020-09-22
10770592 Multi-gate semiconductor device and method for forming the same I-Sheng Chen, Tzu-Chiang Chen, Cheng-Hsien Wu, Carlos H. Diaz 2020-09-08
10741678 Semiconductor device and manufacturing method thereof Chun-Chieh Lu, Carlos H. Diaz, Chih-Sheng Chang, Cheng-Yi Peng, Chien-Hsing Lee 2020-08-11
10741646 Field-effect transistors having contacts to 2D material active region Yee-Chia Yeo, Chi-Wen Liu 2020-08-11
10734472 Negative capacitance FET with improved reliability performance Chun-Chieh Lu, Cheng-Yi Peng, Chien-Hsing Lee, Chih-Sheng Chang, Carlos H. Diaz 2020-08-04
10727230 Integrated semiconductor device with 2D material layer Cheng-Yi Peng, Chun-Chieh Lu, Meng-Hsuan Hsiao, Carlos H. Diaz, Tung Ying Lee 2020-07-28
10535573 System and method for test key characterizing wafer processing state Clement Hsingjen Wann, Chi-Yuan Shih, Wei-Chun Tsai 2020-01-14