Issued Patents 2020
Showing 1–10 of 10 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10872955 | Semiconductor device and fabricating method thereof | Meng-Hsuan Hsiao, Tung Ying Lee, Ling-Yen Yeh, Chih-Sheng Chang, Carlos H. Diaz | 2020-12-22 |
| 10854708 | Capacitor having multiple graphene structures | Chewn-Pu Jou, Chih-Hsin Ko, Po-Wen Chiu, Chao-Ching Cheng, Chi-Feng Huang +3 more | 2020-12-01 |
| 10847736 | Method of manufacturing a semiconductor device and a semiconductor device | Yu-Ming Lin, Ken-Ichi Goto, Jean-Pierre Colinge, Zhiqiang Wu | 2020-11-24 |
| 10825899 | Semiconductor device and fabricating method thereof | Meng-Hsuan Hsiao, Tung Ying Lee, Ling-Yen Yeh, Chih-Sheng Chang, Carlos H. Diaz | 2020-11-03 |
| 10818562 | Semiconductor structure and testing method thereof | Ming-Shiang Lin, Chia-Cheng Ho, Cheng-Yi Peng, Chih-Sheng Chang | 2020-10-27 |
| 10784362 | Semiconductor device and manufacturing method thereof | Carlos H. Diaz, Chih-Sheng Chang, Cheng-Yi Peng, Ling-Yen Yeh | 2020-09-22 |
| 10741678 | Semiconductor device and manufacturing method thereof | Carlos H. Diaz, Chih-Sheng Chang, Cheng-Yi Peng, Ling-Yen Yeh, Chien-Hsing Lee | 2020-08-11 |
| 10734472 | Negative capacitance FET with improved reliability performance | Cheng-Yi Peng, Chien-Hsing Lee, Ling-Yen Yeh, Chih-Sheng Chang, Carlos H. Diaz | 2020-08-04 |
| 10727230 | Integrated semiconductor device with 2D material layer | Cheng-Yi Peng, Meng-Hsuan Hsiao, Ling-Yen Yeh, Carlos H. Diaz, Tung Ying Lee | 2020-07-28 |
| 10700704 | Serial general purpose input/output system | Hsiang-Chun Hu | 2020-06-30 |