Issued Patents 2020
Showing 1–12 of 12 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10868250 | Resistance variable memory structure and method of forming the same | Kuo-Chi Tu, Chih-Yang Chang, Chin-Chieh Yang, Sheng-Hung Shih, Wen-Chun You +2 more | 2020-12-15 |
| 10862029 | Top electrode for device structures in interconnect | Wen-Ting Chu, Kuo-Chi Tu, Chih-Yang Chang, Chin-Chieh Yang, Yu-Wen Liao +2 more | 2020-12-08 |
| 10796759 | Method and apparatus for reading RRAM cell | Chin-Chieh Yang, Chih-Yang Chang, Chang-Sheng Liao, Jen-Sheng Yang, Kuo-Chi Tu +4 more | 2020-10-06 |
| 10763426 | Method for forming a flat bottom electrode via (BEVA) top surface for memory | Chih-Yang Chang, Chin-Chieh Yang, Jen-Sheng Yang, Sheng-Hung Shih, Tung-Sheng Hsiao +3 more | 2020-09-01 |
| 10749108 | Logic compatible RRAM structure and process | Chih-Yang Chang, Chin-Chieh Yang, Kuo-Chi Tu, Wen-Ting Chu, Yu-Wen Liao | 2020-08-18 |
| 10720581 | Barrier layer for resistive random access memory | Tzu-Chung Tsai, Yan Chen | 2020-07-21 |
| 10714536 | Method to form memory cells separated by a void-free dielectric structure | Wen-Ting Chu, Yu-Wen Liao | 2020-07-14 |
| 10700275 | RRAM cell structure with laterally offset BEVA/TEVA | Chih-Yang Chang, Wen-Ting Chu, Kuo-Chi Tu, Yu-Wen Liao, Chin-Chieh Yang +2 more | 2020-06-30 |
| 10636961 | Semiconductor structure and method of forming the same | Harry-Hak-Lay Chuang, Hung Cho Wang, Kuei-Hung Shen | 2020-04-28 |
| 10566519 | Method for forming a flat bottom electrode via (BEVA) top surface for memory | Chih-Yang Chang, Chin-Chieh Yang, Jen-Sheng Yang, Sheng-Hung Shih, Tung-Sheng Hsiao +3 more | 2020-02-18 |
| 10566387 | Interconnect landing method for RRAM technology | Chih-Yang Chang, Chin-Chieh Yang, Jen-Sheng Yang, Kuo-Chi Tu, Wen-Ting Chu +1 more | 2020-02-18 |
| 10529658 | Method for forming a homogeneous bottom electrode via (BEVA) top surface for memory | Wen-Ting Chu, Yu-Wen Liao | 2020-01-07 |