Issued Patents 2020
Showing 1–6 of 6 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10771068 | Reducing chip latency at a clock boundary by reference clock phase adjustment | Steven R. Carlough, Michael W. Harper, Michael B. Spear, Gary A. Van Huben | 2020-09-08 |
| 10747442 | Host controlled data chip address sequencing for a distributed memory buffer system | Steven R. Carlough, Warren E. Maule, Patrick J. Meaney, Stephen J. Powell, Gary A. Van Huben +1 more | 2020-08-18 |
| 10740031 | Interface scheduler for a distributed memory system | Jie Zheng, Stephen J. Powell, Steven R. Carlough | 2020-08-11 |
| 10698440 | Reducing latency of memory read operations returning data on a read data path across multiple clock boundaries, to a host implementing a high speed serial interface | Steven R. Carlough, Michael B. Spear, Gary A. Van Huben, Stephen D. Wyatt | 2020-06-30 |
| 10642535 | Register access in a distributed memory buffer system | Steven R. Carlough, Markus Cebulla, Logan I. Friedman, Patrick J. Meaney, Walter Pietschmann +2 more | 2020-05-05 |
| 10534555 | Host synchronized autonomous data chip address sequencer for a distributed buffer memory system | Steven R. Carlough, Patrick J. Meaney, Stephen J. Powell, Gary A. Van Huben, Jie Zheng | 2020-01-14 |