Issued Patents 2020
Showing 1–12 of 12 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10872960 | Contact architecture for capacitance reduction and satisfactory contact resistance | Pratik A. Patel, Thomas T. TROEGER, Szuya S. Liao | 2020-12-22 |
| 10872820 | Integrated circuit structures | Bruce A. Block, Valluri Rao, Patrick Morrow, Doug B. Ingerly, Kimin Jun +3 more | 2020-12-22 |
| 10861870 | Inverted staircase contact for density improvement to 3D stacked devices | Aaron D. Lilak, Patrick Morrow | 2020-12-08 |
| 10847635 | Vertical integration scheme and circuit elements architecture for area scaling of semiconductor devices | Patrick Morrow, Ranjith Kumar, Cory E. Weber, Seiyon Kim, Stephen M. Cea +1 more | 2020-11-24 |
| 10790281 | Stacked channel structures for MOSFETs | Roza Kotlyar, Stephen M. Cea, Patrick H. Keys | 2020-09-29 |
| 10784358 | Backside contact structures and fabrication for metal on both sides of devices | Patrick Morrow, Aaron D. Lilak, Kimin Jun | 2020-09-22 |
| 10770458 | Nanowire transistor device architectures | Tahir Ghani, Szuya S. Liao, Seiyon Kim | 2020-09-08 |
| 10636907 | Deep EPI enabled by backside reveal for stress enhancement and contact | Aaron D. Lilak, Stephen M. Cea, Patrick Morrow, Patrick H. Keys | 2020-04-28 |
| 10600810 | Backside fin recess control with multi-hsi option | Aaron D. Lilak, Patrick Morrow, Stephen M. Cea, Cory E. Weber | 2020-03-24 |
| 10573715 | Backside isolation for integrated circuit | Aaron D. Lilak, Harold W. Kennel, Paul B. Fischer, Stephen M. Cea | 2020-02-25 |
| 10546873 | Integrated circuit with stacked transistor devices | Aaron D. Lilak | 2020-01-28 |
| 10529827 | Long channel MOS transistors for low leakage applications on a short channel CMOS chip | Patrick Morrow, Paul B. Fischer, Aaron D. Lilak, Stephen M. Cea | 2020-01-07 |