Issued Patents 2020
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10872960 | Contact architecture for capacitance reduction and satisfactory contact resistance | Rishabh Mehandru, Pratik A. Patel, Thomas T. TROEGER | 2020-12-22 |
| 10790354 | Self-aligned gate edge and local interconnect | Milton Clair Webb, Mark Bohr, Tahir Ghani | 2020-09-29 |
| 10770458 | Nanowire transistor device architectures | Rishabh Mehandru, Tahir Ghani, Seiyon Kim | 2020-09-08 |
| 10756215 | Selective deposition utilizing sacrificial blocking layers for semiconductor devices | Grant Kloster, Scott B. Clendenning, Rami Hourani, Patricio E. Romero, Florian Gstrein | 2020-08-25 |
| 10720508 | Fabrication of multi-channel nanowire devices with self-aligned internal spacers and SOI FinFETs using selective silicon nitride capping | Van H. Le, Scott B. Clendenning, Martin M. Mitan | 2020-07-21 |