Issued Patents 2020
Showing 1–8 of 8 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10872011 | Internal error checking and correction (ECC) with extra system bits | Bill Nale, Rajat Agarwal | 2020-12-22 |
| 10839887 | Applying chip select for memory device identification and power management control | Christopher E. Cox, Christopher P. Mozak, James A. McCall, Akshith Vasanth, Bill Nale | 2020-11-17 |
| 10810079 | Memory device error check and scrub mode and error transparency | John B. Halbert | 2020-10-20 |
| 10802532 | Techniques to mirror a command/address or interpret command/address logic at a memory device | George Vergis, Bill Nale | 2020-10-13 |
| 10789010 | Double data rate command bus | George Vergis | 2020-09-29 |
| 10680613 | Programmable on-die termination timing in a multi-rank system | Alexey Kostinsky, Nadav Bonen | 2020-06-09 |
| 10592445 | Techniques to access or operate a dual in-line memory module via multiple data channels | Bill Nale, Christopher E. Cox, George Vergis, James A. McCall, Chong J. Zhao +3 more | 2020-03-17 |
| 10552285 | Impedance compensation based on detecting sensor data | James A. McCall | 2020-02-04 |