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Techniques to mirror a command/address or interpret command/address logic at a memory device |
Kuljit S. Bains, Bill Nale |
2020-10-13 |
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Double data rate command bus |
Kuljit S. Bains |
2020-09-29 |
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Connector with relaxation mechanism for latch |
Phil Geng, Xiang Li, Mani N. Prakash |
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| 10783048 |
High performance persistent memory |
Mohan J. Kumar, Murugasamy K. Nachimuthu |
2020-09-22 |
| 10727618 |
Connector with anchoring power pin |
Xiang Li |
2020-07-28 |
| 10649690 |
Fast memory initialization |
Mohan J. Kumar, Sarathy Jayakumar |
2020-05-12 |
| 10592445 |
Techniques to access or operate a dual in-line memory module via multiple data channels |
Bill Nale, Christopher E. Cox, Kuljit S. Bains, James A. McCall, Chong J. Zhao +3 more |
2020-03-17 |
| 10553974 |
Thermal solution on latch for sodimm connector |
Xiang Li, Douglas Heymann |
2020-02-04 |