Issued Patents 2020
Showing 1–9 of 9 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10877752 | Techniques for current-sensing circuit design for compute-in-memory | Gregory K. Chen, Raghavan Kumar, Phil Knag, Ram Krishnamurthy, Sasikanth Manipatruni +3 more | 2020-12-29 |
| 10860682 | Binary, ternary and bit serial compute-in-memory circuits | Phil Knag, Gregory K. Chen, Raghavan Kumar, Abhishek A. Sharma, Sasikanth Manipatruni +3 more | 2020-12-08 |
| 10831446 | Digital bit-serial multi-multiply-and-accumulate compute in memory | Gregory K. Chen, Raghavan Kumar, Phil Knag, Ram Krishnamurthy, Sasikanth Manipatruni +3 more | 2020-11-10 |
| 10825509 | Full-rail digital read compute-in-memory circuit | Gregory K. Chen, Raghavan Kumar, Phil Knag, Abhishek A. Sharma, Sasikanth Manipatruni +3 more | 2020-11-03 |
| 10748603 | In-memory multiply and accumulate with global charge-sharing | Gregory K. Chen, Raghavan Kumar, Phil Knag, Abhishek A. Sharma, Sasikanth Manipatruni +3 more | 2020-08-18 |
| 10713558 | Neural network with reconfigurable sparse connectivity and online learning | Gregory K. Chen, Raghavan Kumar, Phil Knag, Ram Krishnamurthy | 2020-07-14 |
| 10705967 | Programmable interface to in-memory cache processor | Amrita Mathuriya, Sasikanth Manipatruni, Victor W. Lee, Gregory K. Chen, Raghavan Kumar +4 more | 2020-07-07 |
| 10642922 | Binary, ternary and bit serial compute-in-memory circuits | Phil Knag, Gregory K. Chen, Raghavan Kumar, Abhishek A. Sharma, Sasikanth Manipatruni +3 more | 2020-05-05 |
| 10565138 | Memory device with multiple memory arrays to facilitate in-memory computation | Jack T. Kavalieros, Ram Krishnamurthy, Sasikanth Manipatruni, Gregory K. Chen, Van H. Le +5 more | 2020-02-18 |