Issued Patents 2020
Showing 1–7 of 7 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10831661 | Coherent cache with simultaneous data requests in same addressable index | Ekaterina M. Ambroladze, Tim Bronson, Deanna Postles Dunn Berger, Chad G. Wilson, Kenneth D. Klapproth +3 more | 2020-11-10 |
| 10824565 | Configuration based cache coherency protocol selection | Ekaterina M. Ambroladze, Deanna Postles Dunn Berger, Michael Fee, Arthur J. O'Neill | 2020-11-03 |
| 10795824 | Speculative data return concurrent to an exclusive invalidate request | Deanna Postles Dunn Berger, Christian Jacobi, Craig R. Walters | 2020-10-06 |
| 10649908 | Non-disruptive clearing of varying address ranges from cache | Ekaterina M. Ambroladze, Deanna Postles Dunn Berger, Michael A. Blake, Pak-kin Mak, Guy G. Tracy +1 more | 2020-05-12 |
| 10628314 | Dual clusters of fully connected integrated circuit multiprocessors with shared high-level cache | Michael A. Blake, Timothy C. Bronson, Pak-kin Mak, Vesselina K. Papazova | 2020-04-21 |
| 10628313 | Dual clusters of fully connected integrated circuit multiprocessors with shared high-level cache | Michael A. Blake, Timothy C. Bronson, Pak-kin Mak, Vesselina K. Papazova | 2020-04-21 |
| 10529396 | Preinstall of partial store cache lines | Ekaterina M. Ambroladze, Sascha Junghans, Matthias Klein, Pak-kin Mak, Chad G. Wilson | 2020-01-07 |