Issued Patents 2020
Showing 1–5 of 5 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10649908 | Non-disruptive clearing of varying address ranges from cache | Ekaterina M. Ambroladze, Deanna Postles Dunn Berger, Michael A. Blake, Robert J. Sonnelitter, III, Guy G. Tracy +1 more | 2020-05-12 |
| 10628313 | Dual clusters of fully connected integrated circuit multiprocessors with shared high-level cache | Michael A. Blake, Timothy C. Bronson, Vesselina K. Papazova, Robert J. Sonnelitter, III | 2020-04-21 |
| 10628314 | Dual clusters of fully connected integrated circuit multiprocessors with shared high-level cache | Michael A. Blake, Timothy C. Bronson, Vesselina K. Papazova, Robert J. Sonnelitter, III | 2020-04-21 |
| 10572385 | Granting exclusive cache access using locality cache coherency state | Timothy C. Bronson, Garrett M. Drapala, Vesselina K. Papazova, Hanno Ulrich | 2020-02-25 |
| 10529396 | Preinstall of partial store cache lines | Ekaterina M. Ambroladze, Sascha Junghans, Matthias Klein, Robert J. Sonnelitter, III, Chad G. Wilson | 2020-01-07 |